当前位置：
首页 资源下载
搜索资源 - vhdl data transfer
搜索资源列表
-
0下载：
红外数据传输速率为4Mbit/s时的编解码4PPM，用vhdl实现的源代码，,Infrared data transfer rate of 4Mbit/s when the codec 4PPM, using VHDL implementation of the source code,
-
-
0下载：
实现PS/2接口与RS-232接口的数据传输，
可以通过RS-232自动传送到主机的串口调试终端上并在数据接收区显示接收到的字符。,The realization of PS/2 port RS-232 interface with data transfer, RS-232 can be automatically sent to the host serial debug terminal and reception area in the data display received ch
-
-
3下载：
PCI的FPGA实现，使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
-
-
0下载：
This usefull source for control CIS Sensor
and has fallowed functions
1) Read image data frome 3channel 200dpi CIS Sensor
2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition
3)Psudo Video Ram Read by
-
-
0下载：
UART(即Universal Asynchronous Receiver Transmitter 通用异步收发器)是广泛使用的串行数据传输协议。UART允许在串行链路上进行全双工的通信。-UART (ie Universal Asynchronous Receiver Transmitter Universal Asynchronous Receiver Transmitter) is a widely used serial data transfer protocol. UART allo
-
-
0下载：
VHDL, the transfer of data types
-
-
0下载：
USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control,
-
-
0下载：
sdram的控制程序，程序分为控制端口模块、时钟模块、数据传输模块及刷新等模块-sdram control procedures, process control port is divided into modules, clock modules, data transfer module and refresh modules
-
-
0下载：
MAXII 240 CPLD和6675 开发的0-1023.75度的温度传感数据采集系统，用seg7 LED显示，精度0.25度。探头是K型测温线，Quartus II 6.0调是通过，在cpld开发板上面试验成功-MAXII 240cpld and 0-1023.75 development of 6675 degrees C temperature sensor data acquisition system, using seg7 LED shows that the accuracy o
-
-
0下载：
OFDM communication for data transfer rate at higher speed
-
-
0下载：
程序将通过rs422接口传进来的16bit数据转成串行输出的数据-Program will pass through the rs422 interface 16bit data transfer incoming data into a serial output
-
-
0下载：
4输入，4输出，clos网络所用，有利于连接处理器和处理器，处理器和存储器传输数据。-4 inputs, 4 outputs, clos network use is conducive to connecting the processor and processor, processor and memory to transfer data.
-
-
0下载：
实现spi接口的传输，并多外接EEPROM读写数据-Spi interface to achieve the transfer, and multiple external EEPROM read and write data
-
-
0下载：
这是spi接口传输的一部分内容，本源码一共三部分，功能：spi接口的的实现即对外设的读写数据-This is the spi interface transfer part of the contents of a total of three parts of this source, function: spi interface that the realization of the read and write data to the peripheral
-
-
0下载：
利用ITU656接口传输数据流的方法!已得到应用!-ITU656 interface transfer data streams using the method! Has been applied!
-
-
0下载：
fifo的实现，可以作用于memory的数据传输等地方，在fpga上实现，可以进行综合和仿真-fifo implementation, you can act on memory data transfer and other places, in the fpga to achieve, to undertake a comprehensive and Simulation
-
-
0下载：
单芯片 USB 转 UART 数据转换器
- 集成的 USB 收发器无需外部电阻
- 集成的时钟无需外部振荡器
- 集成的 512 字节 EEPROM 用于为供应商代码产品代码序列号功率标牌版本号和产品描述等数据提供存储空间
- 片内上电复位电路
- 片内电压调节器3.3V 输出
USB 功能控制器
-符合USB 规范 2.0 全速 (12 Mbps)
-通过SUSPEND 和 RI 引脚支持的USB中止状态-Single-Chip USB to UART Dat
-
-
1下载：
实现了FPGA以SPI协议传送和接受16位数据。传送过程无需Nios核干预-SPI protocol to achieve the FPGA to send and receive a 16-bit data. Nios nuclear transfer process without intervention
-
-
0下载：
使用68013的测试程序，包含68013固件程序-use of cy7c68013,data transfer from usb to pc.
-
-
0下载：
This source are usefull function in VHDL
for Transfer MCU Data betwine FPGA
3 port 8bit s wide Mux
-This source are usefull function in VHDL
for Transfer MCU Data betwine FPGA
3 port 8bit s wide Mux
-
