资源列表
PWM34.5%
- 实现占空比为34.5%的PWM波，易于改变使用(A duty cycle of 34.5% PWM wave is achieved with duty cycle of 34.5% PWM wave)
labassignment1
- lab assinment in verilog
Tutorial4 (2)
- Digital logic tutorial 4
Tutorial9 (2)
- Digital Logic Design
lab1
- lab assignment 2 in verilog
labassin1
- assignment in verilog 3
struct2
- assignment in verilog
test
- lab assignment in verilog
coa lab
- lab assignmenbt in verilog
RoundRobin DNS + CTDB负载均衡部署
- 实现系统的高可用性，完成服务器之间的数据负载均衡(High availability of the system is achieved)
ds819_div_gen
- DS819数据手册 LogiCORE IP Divider Generator v4.0(LogiCORE IP Divider Generator v4.0)
array
- Palabos 源文件array.h 就是这个货(Palabos source code 'array.h', that's it)