资源列表
GATEWAY KALKITECH
- LEARN ABOUT GATEWAY KALKITECH SYNC
llnjk
- cdma matlab 的仿真编程,用于cdma通信()
No.201710061347=UART_Verilog
- 1.硬件平台： FPGA； 2.编程语言： Verilog； 3.串口通信RS232的Verilog实现版本；(1. hardware platform: FPGA; 2. programming language: Verilog; The Verilog implementation version of 3. serial port communication RS232;)
Time History Analysis Program For SDOF System
- Time History Analysis Program For SDOF System
fodm
- CDMA2000的仿真平台,使用MATLAB设计完成()
Projec12C887
- full opion , very goood
case30.m
- This is the ieee 30buses system
cmgzyqo
- CDMA与OFDM的全面技术对比文档 德州仪器的PPT()
init_pso.m
- This is a optimization algorithm
MH_DS12C887+AVR
- User AVR with 7seg full option
16f877A_lcd
- pic16f887a with LCD, onyone charatertic
ADC0804
- ADC0804 with msp430 and read + siminitor