资源列表
FPGA模拟I2C协议读写24C02
- FPGA模拟I2C协议读写24C02 verilog 源码(FPGA analog I2C read and write 24C02, verilog source code)
soc_sram_func
- 利用verilog编写的32位 MIPS指令集CPU，sram接口，已上板验证(The 32 bit MIPS instruction set CPU, SRAM interface written by Verilog has been verified on board.)
CIC
- 包括地址产生单元、数据查询单元（可以重新初始化rom中的数据，由matlab产生.coe文件替换）、积分单元、抽取单元、梳状滤波单元，对于初学者很有帮助(Including address generation unit, data query unit (data can be re-initialized in rom, generated by matlab. COE file replacement), integration unit, extraction unit, comb fi
wallace_multiplier
- 华莱士树乘法器，运用了华莱士树状结构和布斯算法，提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)
Quartus_18.0_破解器_Windows密码12345
- Quartus_18.0_破解器_Windows密码12345(Quartus_18.0_crack_Windows,password:12345)
Fundamentals of digital logic with verilog
- Fundamentals of Digital Logic with Verilog Design
rx_module
- 接收机的顶层模块构建,对需要参考的朋友有一定的帮助(The construction of the top module of the receiver is helpful to friends who need reference.)
shifter
- 基于vivado的Xilinx的FPGA其移位寄存器代码(Xilinx's FPGA shift register code based on vivado)
ADS1256
- ads1256驱动代码，用verilog编写,在quartus上运行成功(ADS1256 driver code, written in Verilog, runs successfully on quartus.)
down_up_dds
- 在Vivado下完成AD输入到下变频的功能，频率可配置，通用化设计。(The function of AD input to down conversion is completed under Vivado, and the frequency is configurable and universal design.)
SPI_UART
- SPI读写AD9361，通过串口回读关键寄存器读写是否正确。(SPI reads and writes AD9361, reads and writes the key registers correctly through the serial port.)
128点 基8 FFT
- 使用Verilog语言对128点 基8FFT的实现(Implementation of 128-point basis 8FFT)