资源列表
f6lift
- 不同于网上的四层电梯，这是六层电梯的模拟程序，也是现在学校要求的，vhdl语言开发，在板子上运行良好-vhdl 6 lift
studyFFTcore
- 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
DS18b20VHDL
- 自己写的一个测温元件（ds18b20）的驱动程序，这是一个完整的读出温度VHDL程序，并且包含ds18b20的中英文参考资料-Writing their own, a temperature measurement device (ds18b20) the driver, when a complete read out the temperature of VHDL procedures and contains reference materials in both English and
LVDS_Serdes_list_FPGA1
- FPGA之间的LVDS传输，采用serdes接口，传输速率达到400m-LVDS transmission between the FPGA using serdes interface, transfer rate up to 400m
lai_PWM
- FPGA下PWM的Verilog 源码，含目标程序，可直接下载使用，可用在电机控制中-FPGA in Verilog source code under the PWM, including the target program, can be directly downloaded to use, can be used in motor control in
DPD_LUT
- 一种基于LUT的预失真方法。其中的一部分，有参考价值。-one method of DPD based on LUT
FPGA ppt
- FPGA设计与应用教学课件.ppt 吐血为大家提供-fpga ppt
microblaze_v7_10e
- Xilinx软核microblaze源码(VHDL)版本7.10-microblaze IP core of Xilinx, Edition:7.10
ahb_master1
- this is a code of AMBA AHB master protocol in verilog
verilog
- 是数字信号处理的FPGA实现中所有程序（书中为VHDL)的verilog代码，很好，很有用-Digital signal processing in the FPGA to achieve all the procedures (the book for VHDL) of the verilog code, very good, very useful
在VHDL中实现高精度快速除法
- 高精度的浮点数除法运算，基于浮点运算的FPGA实现，单精度浮点数-High-precision floating-point division operation, the FPGA based on the realization of floating-point operations, single precision floating point
stbc
- STBC的硬件实现源代码，用Verilog语言写的-STBC hardware to achieve source code, written using Verilog language