资源列表
st_11
- cpld状态及设计。 很好的文章。 要设计vhdl状态机的话，最好看看。-cpld state and design. Good paper. Vhdl to design the state machine, the best look.
PCI9052sch
- PLX 9052 PCI接口芯片电路原理图，请用PROTEL下载-File with PLX 9052 PCI interface chip circuit diagram Please download PROTEL
c51formenu
- c51formenu.c该文件是一个用c51编写一个menu的例子．-c51formenu.c the document was a decoder used to prepare a menu examples.
fet440_uart11_38400
- MSP430F449 子程序,MSP-FET430P440 Demo - USART1 UART 38400 Echo ISR, DCO SMCLK.-MSP430F449 subroutine, MSP-FET430P440 Demo-USART1 UART 38400 Echo IS R, the making of SMCLK.
fet440_wdt01
- MSP-FET430P440 Demo - WDT Toggle P5.1 Interval overflow ISR, DCO SMCLK-MSP-FET430P440 Demo - 14d Toggle P5.1 Inte rval overflow ISR, the making of SMCLK
fet440_wdt02
- MSP-FET430P440 Demo - WDT Toggle P5.1 Interval overflow ISR, 32kHz ACLK-MSP-FET430P440 Demo - 14d Toggle P5.1 Inte rval overflow ISR, 32kHz ACLK
fet440_bt01
- MSP-FET430P440 Demo - BasicTimer Toggle P5.1 using ISR, DCO SMCLK-MSP-FET430P440 Demo-P BasicTimer Toggle 5.1 using ISR, the making of SMCLK
fet440_bt02
- MSP-FET430P440 Demo - BasicTimer Toggle P5.1 using ISR, 32kHz SMCLK -MSP-FET430P440 Demo-P BasicTimer Toggle 5.1 using ISR, 32kHz SMCLK
fet440_ta_pwm01
- MSP-FET430P440 Demo - Timer_A PWM TA1-2 upmode, DCO SMCLK-MSP-FET430P440 Demo-Timer_A PWM TA1-2 up mode, the making of SMCLK
hyarm9
- 恒颐arm9原理图(protel),直接可用-Constant Rhythm arm9 diagram (Protel) directly available
FPGACPLDLIB
- protel中CPLD器件的库可以方便的放进protel中-CPLDs the convenience of the protel into China
RTL8019ASEthernet
- 这是一个以太网接口RTL8019AS和电路图一份．希望对大家有点参考-This is a RTL8019AS Ethernet interface and a circuit diagram. We hope that a bit of reference