资源列表
counterfour
- verilog code for counter four
VHDL
- DDS产生正弦波（VHDL语言）用DDS产生3MHZ的正弦波,VHDL控制语言-DDS have a sine wave (VHDL language) 3MHZ generated by the DDS sine wave, VHDL control language
contador_0a7
- contador de 0 a 7 que se reinicia
Stepper_motor_fsm
- stepper motor fsm is the fsm for stepper motor. It indicates the states of stepper motor.
fulladder
- vhdl code for full adder program using libero software.
dsp3-tms320f2812
- 加减法计算，计算z=x+y-w，计算结果数据存储器地址存储内容十进制-Subtraction method to calculate z = x+ yw, the results of data stored in the content of the decimal memory addresses
aic23_loopback
- dsp 使用c语言实现通过dsp技术对外部输入的语音数据进行延时处理，得到其回声。-use c language dsp dsp technology through external input delay voice data processing, to be its echo.
RAMexio
- verilog 语言的，PWM测试 梯形图速度控制程序新鲜的-verilog language, PWM speed control test procedures fresh Ladder
M16s1
- 单片机c51 的16路选择1路的初始化程序，帮助各位的初始化方案-The 16 c51 microcontroller initialization procedure to select a way of helping you to initialize program
quanzixongxiyiji-verilod
- 根据日常生活中的洗衣机使用流程设计状态。 空闲——加水——洗涤——排水——加水——清洗排水——甩干——报警 - according to the processes and the use of washing machine in the daily life of the design state. Idle-------- washing water drainage water------ alarm dry cleaning and drainage
code
- 8051单片机控制可编程定时计数器8253输出所需脉冲波形-8051 8253 control programmable timer counter output pulse waveform required
-C51-ds12887
- MCS-51单片机与时钟日历芯片接口。内含一个锂电池，断电后运行十年以上不丢失数据。 -MCS-51 microcontroller chip interface with clock calendar. Containing a lithium battery, more than a decade after the power runs without loss of data.