资源列表
FastCplxMuply
- This zip folder contains the verilog code for fast complex multiplication source code and its test bench
d1_dec
- d1(BT.656) video decoder VHDL code
VIDEOGEN_PAL
- Spartan-3AN based PAL video sync generator
pie
- 自己设计的RFID中的PIE编码，如果有错误欢迎改正。希望能给大家带来帮助。-RFID in their own design PIE encoding, if the error correction welcome. Hope that we can bring help.
EDA-design-traffic-light
- 在quartus2的基础上，使用VHDL语言编写简易交通灯，描述十字路口的交通灯情况，分为主次通道，次通道没车，主干道一直绿灯，次干道有车，按正常灯亮。-In quartus2, based on the use of VHDL language simple traffic lights, traffic lights crossroads described, divided into primary and secondary channel, the second channel had
149_ta_22
- ACLK / 8 P1.1的输入捕捉（TA0）_NOP（）指令运行到断点看到16捕捉值的差异。 ACLK = 32768Hz的，MCLK = SMCLK =默认〜 800kHz的外部时钟晶振上辛XOUT需要为ACLK -ACLK/8 P1.1 input capture (TA0) _NOP () command to run to the breakpoint to see 16 to capture the value of the difference. ACLK = 32
AD7896
- AD7896与STC89C51的AD转换程序-AD7896 and the AD conversion process STC89C51
QSIE_D01
- 数据采集程序，AD/DA转换，用于机电系统控制领域。-Data acquisition program
SD2405
- 基于ATMEGA88的SD2405时钟芯片读写函数，MEGA系列单片机可直接使用-MEGA series microcontroller based on the ATMEGA88 the SD2405 clock chip reader function can be used directly
PMT
- 实验一 模拟调制解调,调相波的调制解调，以及加噪滤波-Experimental an analog modulation and demodulation, phase modulation and demodulation wave, and with noise filter
ps2
- 使用verilog来对ps2的解码，使大家对ps2更好的理解。-Use verilog to decode for ps2, ps2 make everyone a better understanding.
fre_cnt
- 基于FPGA的频率计模块，数码管显示频率值-Frequency meter module FPGA-based, digital display frequency value