资源列表
SPI
- spi slave model spi slave model
ad0809
- 0809数模转换模块以及1602显示器模块-0809 digital-to-analog conversion module and display module 1602
count16
- count16.vhd 16位BCD计数器VHDL源程序-count16.vhd 16 BCD counter VHDL source
jisuanzhibo
- 该程序实现对信号进行子波的计算，从而能进行数字信号处理，该程序是用C++语言写的-The program realization of the signal wavelet calculation, so that it can carry out digital signal processing, the program is C++ Language written
cam_decode
- cam_decode配置文件用于摄像头采集数据的译码工作-cam_decode design
adder4
- 此源代码是基于Verilog语言的4 位全加器，4 位计数器、 4 位全加器的仿真程序、4 位计数器的仿真程序是用EDA语言描述4 位全加器，有广泛的应用。-The Verilog language source code is based on the 4-bit full adder, 4 bit counter, 4-bit full adder simulation program, 4-bit counter of the simulation program is to use la
randomization
- 数字电视DVB-C/T调制器的randomize模块-Digital TV DVB-C/T randomize the modulator module
ATmega128-ADC-drivers
- ATMEL mega128，模数转换器驱动程序。将.c和.h文件添加进工程。使用时先初始化，然后调用读函数指定通道和参考点压 ，单片机采样完成后返回采样值。-ATMEL mega128, AD converter driver. Will. C and. H file added to the project. When using initialized first, then read function called specified channel and reference point
AD9850
- DDS9850，亲测可用，有中文解释，信号发生器-DDS9850, pro-test is available, there are Chinese explanation, the signal generator
18B20
- 18B20驱动 修改版 可兼容 只需修改晶振部分延时程序就可用-18B20.h temp
kaerman
- 卡尔曼滤波 可以对目标进行跟踪，数据处理 滤波-Kalman filter can track the target, data processing filter
del_skew
- 按键消抖的verilog代码，在fpga开发板上可用，有按键功能的设计如果不消除抖动，可能会造成误触发-a cut key skew verilog code ,it can work on fpga card,key cut skew is very importent,the design may have error without the code.