资源列表
echo_dj
- verilog写的回波抵消程序，相当于写了个回波抵消的芯片，不是dsp，可编译后下载于FPGA,绝对原创，写了很长时间。-Verilog echo canceller written procedures, wrote the equivalent of echo canceller chip, not dsp, can be downloaded from the compiled FPGA, absolute originality, writing for a long time.
ucosii_for 44b0
- 三星公司的ＡＲＭ７芯片S3C44B0X的ｕＣＯＳＩＩ操作系统源码-Samsung's chip ARM7 S3C44B0X uCOSII source operating system
温度测量18b20程序
- 我自己写的ds1820b温度测量程序，可以通过串口工具软件显示温度-I wrote it myself ds1820b temperature measurement procedures, through serial software tools show that the temperature
flash_op
- DSP操作外部FLASH,包括擦除、单字节读写、块读写-external FLASH DSP operations, including the erasure, single-byte read and write, read and write block
步进电机zhj程序
- 步进电机单片机驱动程序-stepping motor driver program
cf_fp_mul_c_8_23
- c语言浮点乘发器，特定数据结构，指数底为10-floating point multiplication hair, a specific data structure, the index for the end of 10
cf_fp_mul_p_11_52
- verilog浮点乘发器，特定数据结构，指数底为10-Verilog float by their hair, a specific data structure, the index for the end of 10
cf_fp_mul_p_8_23
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_p_5_10
- verilog浮点乘发器，特定数据结构，指数底为10,利用pipeline-Verilog float by their hair, a specific data structure, the index for the end of October, using pipeline
cf_fp_mul_c_11_52
- verilog浮点乘发器，特定数据结构，指数底为10-Verilog float by their hair, a specific data structure, the index for the end of 10
bochs-20041110.tar
- PDA上的X86模拟器-PDA on the X86 simulator
XDS510PP
- 自己动手制作DSP仿真器-have to make their own DSP simulator