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文件名称:IIS2BT656
介绍说明－－下载内容来自于网络，使用问题请自行百度
本程序功能为将音频的IIS数据插入bt656数据中一起传输。在程序中，sdata并不从外界输入，而是由内部的一个16位的counter并串转换产生，以此来检测程序在串并转换sdata时是否有遗漏。
本程序并未经过实测，但ModelSim的仿真结果正确。-this program will function as audio data into IIS bt656 together data transmission. In the process, not from outside sdata input, but by an 16 to the counter and have a string of conversion, procedures in order to detect the change sdata series and whether there are any omissions. The procedure has not been measured, but the ModelSim simulation results correctly.
本程序并未经过实测，但ModelSim的仿真结果正确。-this program will function as audio data into IIS bt656 together data transmission. In the process, not from outside sdata input, but by an 16 to the counter and have a string of conversion, procedures in order to detect the change sdata series and whether there are any omissions. The procedure has not been measured, but the ModelSim simulation results correctly.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
IIS2BT656/buffer.v
IIS2BT656/final_iisbt_tb.v
IIS2BT656/iisbt656.v
IIS2BT656/p2sprj.cr.mti
IIS2BT656/p2sprj.mpf
IIS2BT656/p2sprj_tb.v
IIS2BT656/p_2_s.v
IIS2BT656/sim0914.cr.mti
IIS2BT656/sim0914.mpf
IIS2BT656/state_machine.v
IIS2BT656/s_2_p.v
IIS2BT656/transcript
IIS2BT656/vsim.wlf
IIS2BT656/wave.do
IIS2BT656/work/buffer/verilog.asm
IIS2BT656/work/buffer/_primary.dat
IIS2BT656/work/buffer/_primary.vhd
IIS2BT656/work/buffer
IIS2BT656/work/final_iisbt_tb/verilog.asm
IIS2BT656/work/final_iisbt_tb/_primary.dat
IIS2BT656/work/final_iisbt_tb/_primary.vhd
IIS2BT656/work/final_iisbt_tb
IIS2BT656/work/iisbt656/verilog.asm
IIS2BT656/work/iisbt656/_primary.dat
IIS2BT656/work/iisbt656/_primary.vhd
IIS2BT656/work/iisbt656
IIS2BT656/work/parelell2serial/verilog.asm
IIS2BT656/work/parelell2serial/_primary.dat
IIS2BT656/work/parelell2serial/_primary.vhd
IIS2BT656/work/parelell2serial
IIS2BT656/work/ram_dual/verilog.asm
IIS2BT656/work/ram_dual/_primary.dat
IIS2BT656/work/ram_dual/_primary.vhd
IIS2BT656/work/ram_dual
IIS2BT656/work/state_machine/verilog.asm
IIS2BT656/work/state_machine/_primary.dat
IIS2BT656/work/state_machine/_primary.vhd
IIS2BT656/work/state_machine
IIS2BT656/work/s_2_p/verilog.asm
IIS2BT656/work/s_2_p/_primary.dat
IIS2BT656/work/s_2_p/_primary.vhd
IIS2BT656/work/s_2_p
IIS2BT656/work/_info
IIS2BT656/work
IIS2BT656
www.dssz.com.txt
IIS2BT656/final_iisbt_tb.v
IIS2BT656/iisbt656.v
IIS2BT656/p2sprj.cr.mti
IIS2BT656/p2sprj.mpf
IIS2BT656/p2sprj_tb.v
IIS2BT656/p_2_s.v
IIS2BT656/sim0914.cr.mti
IIS2BT656/sim0914.mpf
IIS2BT656/state_machine.v
IIS2BT656/s_2_p.v
IIS2BT656/transcript
IIS2BT656/vsim.wlf
IIS2BT656/wave.do
IIS2BT656/work/buffer/verilog.asm
IIS2BT656/work/buffer/_primary.dat
IIS2BT656/work/buffer/_primary.vhd
IIS2BT656/work/buffer
IIS2BT656/work/final_iisbt_tb/verilog.asm
IIS2BT656/work/final_iisbt_tb/_primary.dat
IIS2BT656/work/final_iisbt_tb/_primary.vhd
IIS2BT656/work/final_iisbt_tb
IIS2BT656/work/iisbt656/verilog.asm
IIS2BT656/work/iisbt656/_primary.dat
IIS2BT656/work/iisbt656/_primary.vhd
IIS2BT656/work/iisbt656
IIS2BT656/work/parelell2serial/verilog.asm
IIS2BT656/work/parelell2serial/_primary.dat
IIS2BT656/work/parelell2serial/_primary.vhd
IIS2BT656/work/parelell2serial
IIS2BT656/work/ram_dual/verilog.asm
IIS2BT656/work/ram_dual/_primary.dat
IIS2BT656/work/ram_dual/_primary.vhd
IIS2BT656/work/ram_dual
IIS2BT656/work/state_machine/verilog.asm
IIS2BT656/work/state_machine/_primary.dat
IIS2BT656/work/state_machine/_primary.vhd
IIS2BT656/work/state_machine
IIS2BT656/work/s_2_p/verilog.asm
IIS2BT656/work/s_2_p/_primary.dat
IIS2BT656/work/s_2_p/_primary.vhd
IIS2BT656/work/s_2_p
IIS2BT656/work/_info
IIS2BT656/work
IIS2BT656
www.dssz.com.txt