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文件名称:top_ram

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  • 上传时间:
    2012-11-16
  • 文件大小:
    3.6mb
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介绍说明--下载内容来自于网络,使用问题请自行百度

在quartus环境下调用ram核并对其进行功能时序仿真-ram
(系统自动生成,下载前可以参看下载内容)

下载文件列表

top_ram/db/altsyncram_l0a1.tdf
top_ram/db/prev_cmp_top_ram.asm.qmsg
top_ram/db/prev_cmp_top_ram.eda.qmsg
top_ram/db/prev_cmp_top_ram.fit.qmsg
top_ram/db/prev_cmp_top_ram.map.qmsg
top_ram/db/prev_cmp_top_ram.qmsg
top_ram/db/prev_cmp_top_ram.tan.qmsg
top_ram/db/top_ram.(0).cnf.cdb
top_ram/db/top_ram.(0).cnf.hdb
top_ram/db/top_ram.(1).cnf.cdb
top_ram/db/top_ram.(1).cnf.hdb
top_ram/db/top_ram.(2).cnf.cdb
top_ram/db/top_ram.(2).cnf.hdb
top_ram/db/top_ram.(3).cnf.cdb
top_ram/db/top_ram.(3).cnf.hdb
top_ram/db/top_ram.asm.qmsg
top_ram/db/top_ram.asm_labs.ddb
top_ram/db/top_ram.cbx.xml
top_ram/db/top_ram.cmp.bpm
top_ram/db/top_ram.cmp.cdb
top_ram/db/top_ram.cmp.ecobp
top_ram/db/top_ram.cmp.hdb
top_ram/db/top_ram.cmp.logdb
top_ram/db/top_ram.cmp.rdb
top_ram/db/top_ram.cmp.tdb
top_ram/db/top_ram.cmp0.ddb
top_ram/db/top_ram.db_info
top_ram/db/top_ram.eco.cdb
top_ram/db/top_ram.eda.qmsg
top_ram/db/top_ram.fit.qmsg
top_ram/db/top_ram.hier_info
top_ram/db/top_ram.hif
top_ram/db/top_ram.map.bpm
top_ram/db/top_ram.map.cdb
top_ram/db/top_ram.map.ecobp
top_ram/db/top_ram.map.hdb
top_ram/db/top_ram.map.logdb
top_ram/db/top_ram.map.qmsg
top_ram/db/top_ram.map_bb.cdb
top_ram/db/top_ram.map_bb.hdb
top_ram/db/top_ram.map_bb.hdbx
top_ram/db/top_ram.map_bb.logdb
top_ram/db/top_ram.pre_map.cdb
top_ram/db/top_ram.pre_map.hdb
top_ram/db/top_ram.psp
top_ram/db/top_ram.root_partition.cmp.atm
top_ram/db/top_ram.root_partition.cmp.dfp
top_ram/db/top_ram.root_partition.cmp.hdbx
top_ram/db/top_ram.root_partition.cmp.logdb
top_ram/db/top_ram.root_partition.cmp.rcf
top_ram/db/top_ram.root_partition.map.atm
top_ram/db/top_ram.root_partition.map.hdbx
top_ram/db/top_ram.root_partition.map.info
top_ram/db/top_ram.rtlv.hdb
top_ram/db/top_ram.rtlv_sg.cdb
top_ram/db/top_ram.rtlv_sg_swap.cdb
top_ram/db/top_ram.sgdiff.cdb
top_ram/db/top_ram.sgdiff.hdb
top_ram/db/top_ram.signalprobe.cdb
top_ram/db/top_ram.sld_design_entry.sci
top_ram/db/top_ram.sld_design_entry_dsc.sci
top_ram/db/top_ram.syn_hier_info
top_ram/db/top_ram.tan.qmsg
top_ram/db/top_ram.tis_db_list.ddb
top_ram/db/top_ram.tmw_info
top_ram/ram.bsf
top_ram/ram.qip
top_ram/ram.v
top_ram/ram_bb.v
top_ram/ram_inst.v
top_ram/ram_syn.v
top_ram/ram_wave0.jpg
top_ram/ram_wave1.jpg
top_ram/ram_waveforms.html
top_ram/simulation/modelsim/msim_transcript
top_ram/simulation/modelsim/top_ram.cr.mti
top_ram/simulation/modelsim/top_ram.mpf
top_ram/simulation/modelsim/top_ram.sft
top_ram/simulation/modelsim/top_ram.vo
top_ram/simulation/modelsim/top_ram.vt
top_ram/simulation/modelsim/top_ram.vt.bak
top_ram/simulation/modelsim/top_ram_modelsim.xrf
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak1
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak2
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak3
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak4
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak5
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak6
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak7
top_ram/simulation/modelsim/top_ram_run_msim_gate_verilog.do.bak8
top_ram/simulation/modelsim/top_ram_run_msim_rtl_verilog.do
top_ram/simulation/modelsim/top_ram_v.sdo
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s/verilog.asm
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s/_primary.dat
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s/_primary.vhd
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@m@f_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n/verilog.asm
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@m@f_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n/_primary.dat
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@m@f_@h@i@n@t_@e@v@a@l@u@a@t@i@o@n/_primary.vhd
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@m@f_@m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n/verilog.asm
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@m@f_@m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n/_primary.dat
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@a@l@t@e@r@a_@m@f_@m@e@m@o@r@y_@i@n@i@t@i@a@l@i@z@a@t@i@o@n/_primary.vhd
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@c@y@c@l@o@n@e@i@i_@p@r@i@m_@d@f@f@e/verilog.asm
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@c@y@c@l@o@n@e@i@i_@p@r@i@m_@d@f@f@e/_primary.dat
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@c@y@c@l@o@n@e@i@i_@p@r@i@m_@d@f@f@e/_primary.vhd
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@l@p@m_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s/verilog.asm
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@l@p@m_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s/_primary.dat
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@l@p@m_@d@e@v@i@c@e_@f@a@m@i@l@i@e@s/_primary.vhd
top_ram/simulation/modelsim/verilog_libs/cycloneii_ver/@l@p@m_@h@i@n@t_@e@v@a@l@u@a@t

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