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文件名称:ref-ddr-sdram-vhdl

  • 所属分类：
    其它
  • 标签属性：
    [Text]
  • 上传时间：
    2008-10-13
  • 文件大小：
    426.81kb
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    0次
  • 提 供 者：
    ke***
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修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

本程序是DDR SDRAM控制器的VHDL程序，由ALTERA 提供-this procedure is DDR SDRAM controller VHDL procedures provided by Altera
(系统自动生成,下载前可以参看下载内容)

下载文件列表

ref-ddr-sdram-vhdl/readme.txt
ref-ddr-sdram-vhdl/synthesis/synplicity/ddr_sdram.prj
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.srm
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.srr
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.srs
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.tcl
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.tlg
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.vqm
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram.xrf
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram_cons.tcl
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1/ddr_sdram_rm.tcl
ref-ddr-sdram-vhdl/synthesis/synplicity/rev_1
ref-ddr-sdram-vhdl/synthesis/synplicity
ref-ddr-sdram-vhdl/synthesis
ref-ddr-sdram-vhdl/source/ddr_command.vhd
ref-ddr-sdram-vhdl/source/ddr_control_interface.vhd
ref-ddr-sdram-vhdl/source/ddr_data_path.vhd
ref-ddr-sdram-vhdl/source/ddr_sdram.vhd
ref-ddr-sdram-vhdl/source
ref-ddr-sdram-vhdl/simulation/APEX20KE_MF.VHD
ref-ddr-sdram-vhdl/simulation/ddr_command.vhd
ref-ddr-sdram-vhdl/simulation/ddr_control_interface.vhd
ref-ddr-sdram-vhdl/simulation/ddr_data_path.vhd
ref-ddr-sdram-vhdl/simulation/ddr_sdram.vhd
ref-ddr-sdram-vhdl/simulation/ddr_sdram_tb.vhd
ref-ddr-sdram-vhdl/simulation/io_utils.vhd
ref-ddr-sdram-vhdl/simulation/lpm_pack.vhd
ref-ddr-sdram-vhdl/simulation/modelsim.ini
ref-ddr-sdram-vhdl/simulation/mt46v4m16.vhd
ref-ddr-sdram-vhdl/simulation/mti_pkg.vhd
ref-ddr-sdram-vhdl/simulation/pll1.vhd
ref-ddr-sdram-vhdl/simulation/readme.txt
ref-ddr-sdram-vhdl/simulation/stdlogar.vhd
ref-ddr-sdram-vhdl/simulation/util1164.vhd
ref-ddr-sdram-vhdl/simulation/wave.do
ref-ddr-sdram-vhdl/simulation/work/_info
ref-ddr-sdram-vhdl/simulation/work/util_1164/body.dat
ref-ddr-sdram-vhdl/simulation/work/util_1164/body.psm
ref-ddr-sdram-vhdl/simulation/work/util_1164/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/util_1164/_vhdl.psm
ref-ddr-sdram-vhdl/simulation/work/util_1164
ref-ddr-sdram-vhdl/simulation/work/std_logic_arith/body.dat
ref-ddr-sdram-vhdl/simulation/work/std_logic_arith/body.psm
ref-ddr-sdram-vhdl/simulation/work/std_logic_arith/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/std_logic_arith/_vhdl.psm
ref-ddr-sdram-vhdl/simulation/work/std_logic_arith
ref-ddr-sdram-vhdl/simulation/work/pll1/syn.dat
ref-ddr-sdram-vhdl/simulation/work/pll1/syn.psm
ref-ddr-sdram-vhdl/simulation/work/pll1/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/pll1
ref-ddr-sdram-vhdl/simulation/work/mti_pkg/body.dat
ref-ddr-sdram-vhdl/simulation/work/mti_pkg/body.psm
ref-ddr-sdram-vhdl/simulation/work/mti_pkg/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/mti_pkg/_vhdl.psm
ref-ddr-sdram-vhdl/simulation/work/mti_pkg
ref-ddr-sdram-vhdl/simulation/work/mt46v4m16/behave.dat
ref-ddr-sdram-vhdl/simulation/work/mt46v4m16/behave.psm
ref-ddr-sdram-vhdl/simulation/work/mt46v4m16/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/mt46v4m16
ref-ddr-sdram-vhdl/simulation/work/lpm_components/body.dat
ref-ddr-sdram-vhdl/simulation/work/lpm_components/body.psm
ref-ddr-sdram-vhdl/simulation/work/lpm_components/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/lpm_components/_vhdl.psm
ref-ddr-sdram-vhdl/simulation/work/lpm_components
ref-ddr-sdram-vhdl/simulation/work/io_utils/body.dat
ref-ddr-sdram-vhdl/simulation/work/io_utils/body.psm
ref-ddr-sdram-vhdl/simulation/work/io_utils/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/io_utils/_vhdl.psm
ref-ddr-sdram-vhdl/simulation/work/io_utils
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram_tb/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram_tb/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram_tb/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram_tb
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_sdram
ref-ddr-sdram-vhdl/simulation/work/ddr_data_path/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_data_path/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/ddr_data_path/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_data_path
ref-ddr-sdram-vhdl/simulation/work/ddr_control_interface/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_control_interface/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/ddr_control_interface/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_control_interface
ref-ddr-sdram-vhdl/simulation/work/ddr_command/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_command/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/ddr_command/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/ddr_command
ref-ddr-sdram-vhdl/simulation/work/control_interface/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/control_interface/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/control_interface/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/control_interface
ref-ddr-sdram-vhdl/simulation/work/command/rtl.dat
ref-ddr-sdram-vhdl/simulation/work/command/rtl.psm
ref-ddr-sdram-vhdl/simulation/work/command/_primary.dat
ref-ddr-sdram-vhdl/simulation/work/command
ref-ddr-sdram-vhdl/simulation/work/altlvds_tx/behavior.dat
ref-ddr-sdram-vhdl

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