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文件名称:full-add-16bit
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- 上传时间：2012-11-16
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文件大小：23.09kb
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已下载：0次
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full adder 16bit..it s okie
(系统自动生成,下载前可以参看下载内容)
下载文件列表
full_add_16.v
full_add_16.v.bak
h_a.v
h_a.v.bak
modelsim.ini
top.v
top.v.bak
vsim.wlf
work/cong/verilog.psm
work/cong/_primary.dat
work/cong/_primary.vhd
work/full_adder/verilog.psm
work/full_adder/_primary.dat
work/full_adder/_primary.vhd
work/h_a/verilog.psm
work/h_a/_primary.dat
work/h_a/_primary.vhd
work/top/verilog.psm
work/top/_primary.dat
work/top/_primary.vhd
work/_info
cong.v
cong.v.bak
work/cong
work/full_adder
work/h_a
work/top
work/_temp
work
full_add_16.v.bak
h_a.v
h_a.v.bak
modelsim.ini
top.v
top.v.bak
vsim.wlf
work/cong/verilog.psm
work/cong/_primary.dat
work/cong/_primary.vhd
work/full_adder/verilog.psm
work/full_adder/_primary.dat
work/full_adder/_primary.vhd
work/h_a/verilog.psm
work/h_a/_primary.dat
work/h_a/_primary.vhd
work/top/verilog.psm
work/top/_primary.dat
work/top/_primary.vhd
work/_info
cong.v
cong.v.bak
work/cong
work/full_adder
work/h_a
work/top
work/_temp
work