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文件名称:MIPS_final-version
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- 上传时间：2012-11-16
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文件大小：8.89kb
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以Verilog所撰寫的Booth’s Algorithm Multiplier，可加到NiosII CPU之上，完成一道NiosII CPU的新指令。-Written by Verilog Booth,' s Algorithm Multiplier can be added to the above NiosII CPU to complete a the Nios II CPU command.
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下载文件列表
cpu.v
cpuTest.v
CU.v
DM.v
exmem.v
idex.v
ifid.v
IM.v
logicshifter.v
memwb.v
reg32.v
RF.v
ALU.v
alu_ctrl.v
CLA.v
cpuTest.v
CU.v
DM.v
exmem.v
idex.v
ifid.v
IM.v
logicshifter.v
memwb.v
reg32.v
RF.v
ALU.v
alu_ctrl.v
CLA.v
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