文件名称:Lab4
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- 上传时间:2013-12-30
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文件大小:4.73mb
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基于zynq开发板的嵌入式系统一个demo,实现led点亮。使用xps开发工具实现的。-Zynq development board based on an embedded system demo, realization led lights. Use xps development tools to achieve.
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下载文件列表
Lab4/clock_generator_0.log
Lab4/data/ps7_constraints.ucf
Lab4/data/ps7_constraints.xdc
Lab4/data/ps7_system_prj.xml
Lab4/data/system.ucf
Lab4/data/system.xdc
Lab4/drivers/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.mdd
Lab4/drivers/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.tcl
Lab4/drivers/my_axi_ip_v1_00_a/src/Makefile
Lab4/drivers/my_axi_ip_v1_00_a/src/my_axi_ip.c
Lab4/drivers/my_axi_ip_v1_00_a/src/my_axi_ip.h
Lab4/drivers/my_axi_ip_v1_00_a/src/my_axi_ip_selftest.c
Lab4/etc/bitgen.ut
Lab4/etc/download.cmd
Lab4/etc/fast_runtime.opt
Lab4/etc/system.filters
Lab4/etc/system.gui
Lab4/hdl/system.vhd
Lab4/hdl/system_axi_interconnect_1_wrapper.v
Lab4/hdl/system_my_axi_ip_0_wrapper.vhd
Lab4/hdl/system_processing_system7_0_wrapper.v
Lab4/hdl/system_stub.vhd
Lab4/implementation/axi_interconnect_1_wrapper/axi_interconnect_1.xdc
Lab4/implementation/axi_interconnect_1_wrapper/system_axi_interconnect_1_wrapper.ngc
Lab4/implementation/axi_interconnect_1_wrapper/_xmsgs/ngcbuild.xmsgs
Lab4/implementation/bitgen.ut
Lab4/implementation/cache/cache.cat
Lab4/implementation/cache/system_axi_interconnect_1_wrapper.ngc
Lab4/implementation/cache/system_my_axi_ip_0_wrapper.ngc
Lab4/implementation/cache/system_processing_system7_0_wrapper.ngc
Lab4/implementation/fpga.flw
Lab4/implementation/netlist.lst
Lab4/implementation/par_usage_statistics.html
Lab4/implementation/processing_system7_0_wrapper/processing_system7_0.xdc
Lab4/implementation/system.bgn
Lab4/implementation/system.bit
Lab4/implementation/system.bld
Lab4/implementation/system.bmm
Lab4/implementation/system.drc
Lab4/implementation/system.ncd
Lab4/implementation/system.ngc
Lab4/implementation/system.ngc_xst.xrpt
Lab4/implementation/system.ngd
Lab4/implementation/system.pad
Lab4/implementation/system.par
Lab4/implementation/system.pcf
Lab4/implementation/system.ptwx
Lab4/implementation/system.twr
Lab4/implementation/system.twx
Lab4/implementation/system.ucf
Lab4/implementation/system.unroutes
Lab4/implementation/system.xpi
Lab4/implementation/system_axi_interconnect_1_wrapper.blc
Lab4/implementation/system_axi_interconnect_1_wrapper.ncf
Lab4/implementation/system_axi_interconnect_1_wrapper.ngc
Lab4/implementation/system_axi_interconnect_1_wrapper.ngc_xst.xrpt
Lab4/implementation/system_bitgen.xwbt
Lab4/implementation/system_map.map
Lab4/implementation/system_map.mrp
Lab4/implementation/system_map.ncd
Lab4/implementation/system_map.ngm
Lab4/implementation/system_map.xrpt
Lab4/implementation/system_my_axi_ip_0_wrapper.ngc
Lab4/implementation/system_my_axi_ip_0_wrapper.ngc_xst.xrpt
Lab4/implementation/system_ngdbuild.xrpt
Lab4/implementation/system_pad.csv
Lab4/implementation/system_pad.txt
Lab4/implementation/system_par.xrpt
Lab4/implementation/system_processing_system7_0_wrapper.ncf
Lab4/implementation/system_processing_system7_0_wrapper.ngc
Lab4/implementation/system_processing_system7_0_wrapper.ngc_xst.xrpt
Lab4/implementation/system_stub.bmm
Lab4/implementation/system_summary.html
Lab4/implementation/system_summary.xml
Lab4/implementation/system_usage.xml
Lab4/implementation/usage_statistics_webtalk.html
Lab4/implementation/webtalk.log
Lab4/implementation/xflow.his
Lab4/implementation/xflow.log
Lab4/implementation/xflow.opt
Lab4/implementation/xflow_script.bat
Lab4/implementation/xlnx_auto_0_xdb/cst.xbcd
Lab4/implementation/_xmsgs/bitgen.xmsgs
Lab4/implementation/_xmsgs/map.xmsgs
Lab4/implementation/_xmsgs/ngdbuild.xmsgs
Lab4/implementation/_xmsgs/par.xmsgs
Lab4/implementation/_xmsgs/trce.xmsgs
Lab4/jpeg/1.jpg
Lab4/jpeg/10.jpg
Lab4/jpeg/11.jpg
Lab4/jpeg/12.jpg
Lab4/jpeg/13.jpg
Lab4/jpeg/14.1.jpg
Lab4/jpeg/14.jpg
Lab4/jpeg/15.jpg
Lab4/jpeg/16.jpg
Lab4/jpeg/17.jpg
Lab4/jpeg/18.jpg
Lab4/jpeg/19.jpg
Lab4/jpeg/2.jpg
Lab4/jpeg/20.jpg
Lab4/jpeg/3.jpg
Lab4/jpeg/4.jpg
Lab4/jpeg/5.jpg
Lab4/jpeg/6.jpg
Lab4/jpeg/7.jpg
Lab4/jpeg/8.jpg
Lab4/jpeg/9.jpg
Lab4/jpeg/Thumbs.db
Lab4/pcores/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.mpd
Lab4/pcores/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.pao
Lab4/pcores/my_axi_ip_v1_00_a/data/_my_axi_ip_xst.prj
Lab4/pcores/my_axi_ip_v1_00_a/devl/create.cip
Lab4/pcores/my_axi_ip_v1_00_a/devl/ipwiz.log
Lab4/pcores/my_axi_ip_v1_00_a/devl/ipwiz.opt
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/my_axi_ip.gise
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/my_axi_ip.tcl
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/my_axi_ip.xise
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/_xmsgs/pn_parser.xmsgs
Lab4/pcores/my_axi_ip_v1_00_a/devl/README.txt
Lab4/pcores/my_axi_ip_v1_00_a/devl/synthesis/my_axi_ip_xst.prj
Lab4/pcores/my_axi_ip_v1_00_a/devl/synthesis/my_axi_ip_xst.scr
Lab4/pcores/my_axi_ip_v1_00_a/hdl/verilog/user_logic.v
Lab4/pcores/my_axi_ip_v1_00_a/hdl/vhdl/my_axi_ip.vhd
Lab4/platgen.log
Lab4/platgen.opt
Lab4/psf2Edward.log
Lab4/ps_clock_registers.log
Lab4/SDK/SDK_Export/hw/docs/ip/axi_interconnect.pdf
Lab4/SDK/SDK_Export/hw/docs/ip/processing_system7.pdf
Lab4/SDK/SDK_Export/hw/imgs/axi_interconnect_1.jpg
Lab4/SDK/SDK_Export/hw/imgs/axi_interconnect_1.svg
Lab4/SDK/SDK_Export/hw/imgs/IMG_closeBranch.png
Lab4/SDK/SDK_Export/hw/imgs/IMG_LicensedCore.bmp
Lab4/SDK/SDK_Export/hw/imgs/IMG_openBranch.png
Lab4/SD
Lab4/data/ps7_constraints.ucf
Lab4/data/ps7_constraints.xdc
Lab4/data/ps7_system_prj.xml
Lab4/data/system.ucf
Lab4/data/system.xdc
Lab4/drivers/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.mdd
Lab4/drivers/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.tcl
Lab4/drivers/my_axi_ip_v1_00_a/src/Makefile
Lab4/drivers/my_axi_ip_v1_00_a/src/my_axi_ip.c
Lab4/drivers/my_axi_ip_v1_00_a/src/my_axi_ip.h
Lab4/drivers/my_axi_ip_v1_00_a/src/my_axi_ip_selftest.c
Lab4/etc/bitgen.ut
Lab4/etc/download.cmd
Lab4/etc/fast_runtime.opt
Lab4/etc/system.filters
Lab4/etc/system.gui
Lab4/hdl/system.vhd
Lab4/hdl/system_axi_interconnect_1_wrapper.v
Lab4/hdl/system_my_axi_ip_0_wrapper.vhd
Lab4/hdl/system_processing_system7_0_wrapper.v
Lab4/hdl/system_stub.vhd
Lab4/implementation/axi_interconnect_1_wrapper/axi_interconnect_1.xdc
Lab4/implementation/axi_interconnect_1_wrapper/system_axi_interconnect_1_wrapper.ngc
Lab4/implementation/axi_interconnect_1_wrapper/_xmsgs/ngcbuild.xmsgs
Lab4/implementation/bitgen.ut
Lab4/implementation/cache/cache.cat
Lab4/implementation/cache/system_axi_interconnect_1_wrapper.ngc
Lab4/implementation/cache/system_my_axi_ip_0_wrapper.ngc
Lab4/implementation/cache/system_processing_system7_0_wrapper.ngc
Lab4/implementation/fpga.flw
Lab4/implementation/netlist.lst
Lab4/implementation/par_usage_statistics.html
Lab4/implementation/processing_system7_0_wrapper/processing_system7_0.xdc
Lab4/implementation/system.bgn
Lab4/implementation/system.bit
Lab4/implementation/system.bld
Lab4/implementation/system.bmm
Lab4/implementation/system.drc
Lab4/implementation/system.ncd
Lab4/implementation/system.ngc
Lab4/implementation/system.ngc_xst.xrpt
Lab4/implementation/system.ngd
Lab4/implementation/system.pad
Lab4/implementation/system.par
Lab4/implementation/system.pcf
Lab4/implementation/system.ptwx
Lab4/implementation/system.twr
Lab4/implementation/system.twx
Lab4/implementation/system.ucf
Lab4/implementation/system.unroutes
Lab4/implementation/system.xpi
Lab4/implementation/system_axi_interconnect_1_wrapper.blc
Lab4/implementation/system_axi_interconnect_1_wrapper.ncf
Lab4/implementation/system_axi_interconnect_1_wrapper.ngc
Lab4/implementation/system_axi_interconnect_1_wrapper.ngc_xst.xrpt
Lab4/implementation/system_bitgen.xwbt
Lab4/implementation/system_map.map
Lab4/implementation/system_map.mrp
Lab4/implementation/system_map.ncd
Lab4/implementation/system_map.ngm
Lab4/implementation/system_map.xrpt
Lab4/implementation/system_my_axi_ip_0_wrapper.ngc
Lab4/implementation/system_my_axi_ip_0_wrapper.ngc_xst.xrpt
Lab4/implementation/system_ngdbuild.xrpt
Lab4/implementation/system_pad.csv
Lab4/implementation/system_pad.txt
Lab4/implementation/system_par.xrpt
Lab4/implementation/system_processing_system7_0_wrapper.ncf
Lab4/implementation/system_processing_system7_0_wrapper.ngc
Lab4/implementation/system_processing_system7_0_wrapper.ngc_xst.xrpt
Lab4/implementation/system_stub.bmm
Lab4/implementation/system_summary.html
Lab4/implementation/system_summary.xml
Lab4/implementation/system_usage.xml
Lab4/implementation/usage_statistics_webtalk.html
Lab4/implementation/webtalk.log
Lab4/implementation/xflow.his
Lab4/implementation/xflow.log
Lab4/implementation/xflow.opt
Lab4/implementation/xflow_script.bat
Lab4/implementation/xlnx_auto_0_xdb/cst.xbcd
Lab4/implementation/_xmsgs/bitgen.xmsgs
Lab4/implementation/_xmsgs/map.xmsgs
Lab4/implementation/_xmsgs/ngdbuild.xmsgs
Lab4/implementation/_xmsgs/par.xmsgs
Lab4/implementation/_xmsgs/trce.xmsgs
Lab4/jpeg/1.jpg
Lab4/jpeg/10.jpg
Lab4/jpeg/11.jpg
Lab4/jpeg/12.jpg
Lab4/jpeg/13.jpg
Lab4/jpeg/14.1.jpg
Lab4/jpeg/14.jpg
Lab4/jpeg/15.jpg
Lab4/jpeg/16.jpg
Lab4/jpeg/17.jpg
Lab4/jpeg/18.jpg
Lab4/jpeg/19.jpg
Lab4/jpeg/2.jpg
Lab4/jpeg/20.jpg
Lab4/jpeg/3.jpg
Lab4/jpeg/4.jpg
Lab4/jpeg/5.jpg
Lab4/jpeg/6.jpg
Lab4/jpeg/7.jpg
Lab4/jpeg/8.jpg
Lab4/jpeg/9.jpg
Lab4/jpeg/Thumbs.db
Lab4/pcores/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.mpd
Lab4/pcores/my_axi_ip_v1_00_a/data/my_axi_ip_v2_1_0.pao
Lab4/pcores/my_axi_ip_v1_00_a/data/_my_axi_ip_xst.prj
Lab4/pcores/my_axi_ip_v1_00_a/devl/create.cip
Lab4/pcores/my_axi_ip_v1_00_a/devl/ipwiz.log
Lab4/pcores/my_axi_ip_v1_00_a/devl/ipwiz.opt
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/my_axi_ip.gise
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/my_axi_ip.tcl
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/my_axi_ip.xise
Lab4/pcores/my_axi_ip_v1_00_a/devl/projnav/_xmsgs/pn_parser.xmsgs
Lab4/pcores/my_axi_ip_v1_00_a/devl/README.txt
Lab4/pcores/my_axi_ip_v1_00_a/devl/synthesis/my_axi_ip_xst.prj
Lab4/pcores/my_axi_ip_v1_00_a/devl/synthesis/my_axi_ip_xst.scr
Lab4/pcores/my_axi_ip_v1_00_a/hdl/verilog/user_logic.v
Lab4/pcores/my_axi_ip_v1_00_a/hdl/vhdl/my_axi_ip.vhd
Lab4/platgen.log
Lab4/platgen.opt
Lab4/psf2Edward.log
Lab4/ps_clock_registers.log
Lab4/SDK/SDK_Export/hw/docs/ip/axi_interconnect.pdf
Lab4/SDK/SDK_Export/hw/docs/ip/processing_system7.pdf
Lab4/SDK/SDK_Export/hw/imgs/axi_interconnect_1.jpg
Lab4/SDK/SDK_Export/hw/imgs/axi_interconnect_1.svg
Lab4/SDK/SDK_Export/hw/imgs/IMG_closeBranch.png
Lab4/SDK/SDK_Export/hw/imgs/IMG_LicensedCore.bmp
Lab4/SDK/SDK_Export/hw/imgs/IMG_openBranch.png
Lab4/SD
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