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文件名称:C5G_AD_DA_hsmc

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [Matlab] [源码]
  • 上传时间：
    2014-11-26
  • 文件大小：
    1.9mb
  • 已下载：
    0次
  • 提 供 者：
    q***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

关于altera最新的C5代的开发板的DA、AD转换资料-The latest generation C5 on altera development board DA, AD conversion data
(系统自动生成,下载前可以参看下载内容)

下载文件列表

C5G_AD_DA_hsmc/
C5G_AD_DA_hsmc/AD_DA_hsmc/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.asm.rpt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.cdf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.done
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.fit.rpt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.fit.smsg
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.fit.summary
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.flow.rpt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.jdi
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.map.rpt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.map.summary
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.pin
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.qpf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.qsf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.qws
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.sdc
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.sof
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.sta.rpt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.sta.summary
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/C5G_ADA_assignment_defaults.qdf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/c5_pin_model_dump.txt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/cio_dump_disallowed_lists.echo
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/demo_batch/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/demo_batch/C5G_ADA.bat
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/demo_batch/C5G_ADA.sof
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/figure/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/figure/AD.fig
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/figure/AD.jpg
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/figure/DA.fig
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/figure/DA.jpg
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/hc_output/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/hc_output/C5G_ADA.names_drv_tbl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/lpm_pll.xml
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/nstp_plot.m
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/PLLJ_PLLSPE_INFO.txt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/stp1.stp
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/stp1_auto_signaltap_0.txt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/stp1_auto_stripped.stp
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/C5G_ADDA.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/C5G_ADDA.v.bak
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/greybox_tmp/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/greybox_tmp/cbx_args.txt
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_add.bsf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_add.qip
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_add.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_add_bb.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_add_inst.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco.bsf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco.html
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco.qip
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco.vec
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10.bsf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10.html
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10.qip
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10.vec
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_bb.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_cos_c.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_cos_f.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_model.m
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_nativelink.tcl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_sin_c.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_sin_f.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_st.inc
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_st.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_tb.m
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_tb.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_tb.vhd
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_vho_msim.tcl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_vo_msim.tcl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco10_wave.do
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_bb.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_cos_c.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_cos_f.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_model.m
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_nativelink.tcl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_sin_c.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_sin_f.hex
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_st.inc
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_st.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_tb.m
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_tb.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_tb.vhd
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_vho_msim.tcl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_vo_msim.tcl
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_nco_wave.do
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll/
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll/lpm_pll_0002.qip
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll/lpm_pll_0002.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.bsf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.cmp
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.ppf
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.qip
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.sip
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.spd
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/lpm_pll.v
C5G_AD_DA_hsmc/AD_DA_hsmc/C5G_ADA/V/

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