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文件名称:Lvds_lattice

  • 所属分类：
    VHDL-FPGA-Verilog
  • 标签属性：
    [VHDL] [源码]
  • 上传时间：
    2016-05-04
  • 文件大小：
    369.46kb
  • 已下载：
    0次
  • 提 供 者：
    x****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

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这是基于lattice fpga 芯片的 ttl 24bits（rgb888）模块。简单易懂，修改输出分辨率只需要修改几行宏定义。整个工程文件在diamond2.0版本上编译运行。-This is based on ttl 24bits lattice fpga chip (rgb888) module. Easy to understand and modify the output resolution is only need to change a few lines of macro definitions. The whole project file is compiled to run on diamond2.0 version.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Lvds/
Lvds/.run_manager.ini
Lvds/.setting.ini
Lvds/.spread_sheet.ini
Lvds/.spreadsheet_view.ini
Lvds/Lvds_test/
Lvds/Lvds_test/.build_status
Lvds/Lvds_test/AutoConstraint_ttl_out.sdc
Lvds/Lvds_test/Lvds_test.areasrr
Lvds/Lvds_test/Lvds_test.edi
Lvds/Lvds_test/Lvds_test.fse
Lvds/Lvds_test/Lvds_test.htm
Lvds/Lvds_test/Lvds_test.srd
Lvds/Lvds_test/Lvds_test.srm
Lvds/Lvds_test/Lvds_test.srr
Lvds/Lvds_test/Lvds_test.srs
Lvds/Lvds_test/Lvds_test_Lvds_test.areasrr
Lvds/Lvds_test/Lvds_test_Lvds_test.dir/
Lvds/Lvds_test/Lvds_test_Lvds_test.dir/5_1.ncd
Lvds/Lvds_test/Lvds_test_Lvds_test.dir/5_1.pad
Lvds/Lvds_test/Lvds_test_Lvds_test.dir/5_1.par
Lvds/Lvds_test/Lvds_test_Lvds_test.dir/5_1_par.asd
Lvds/Lvds_test/Lvds_test_Lvds_test.dir/Lvds_test_Lvds_test.par
Lvds/Lvds_test/Lvds_test_Lvds_test.edi
Lvds/Lvds_test/Lvds_test_Lvds_test.fse
Lvds/Lvds_test/Lvds_test_Lvds_test.log
Lvds/Lvds_test/Lvds_test_Lvds_test.mrp
Lvds/Lvds_test/Lvds_test_Lvds_test.mt
Lvds/Lvds_test/Lvds_test_Lvds_test.ncd
Lvds/Lvds_test/Lvds_test_Lvds_test.ngd
Lvds/Lvds_test/Lvds_test_Lvds_test.ngo
Lvds/Lvds_test/Lvds_test_Lvds_test.p2t
Lvds/Lvds_test/Lvds_test_Lvds_test.p3t
Lvds/Lvds_test/Lvds_test_Lvds_test.pad
Lvds/Lvds_test/Lvds_test_Lvds_test.par
Lvds/Lvds_test/Lvds_test_Lvds_test.prf
Lvds/Lvds_test/Lvds_test_Lvds_test.pt
Lvds/Lvds_test/Lvds_test_Lvds_test.srd
Lvds/Lvds_test/Lvds_test_Lvds_test.srf
Lvds/Lvds_test/Lvds_test_Lvds_test.srf_Min
Lvds/Lvds_test/Lvds_test_Lvds_test.srm
Lvds/Lvds_test/Lvds_test_Lvds_test.srs
Lvds/Lvds_test/Lvds_test_Lvds_test.szr
Lvds/Lvds_test/Lvds_test_Lvds_test.tw1
Lvds/Lvds_test/Lvds_test_Lvds_test.twr
Lvds/Lvds_test/Lvds_test_Lvds_test_iotiming.html
Lvds/Lvds_test/Lvds_test_Lvds_test_map.asd
Lvds/Lvds_test/Lvds_test_Lvds_test_map.cam
Lvds/Lvds_test/Lvds_test_Lvds_test_map.hrr
Lvds/Lvds_test/Lvds_test_Lvds_test_map.ncd
Lvds/Lvds_test/Lvds_test_Lvds_test_mrp.html
Lvds/Lvds_test/Lvds_test_Lvds_test_ngd.asd
Lvds/Lvds_test/Lvds_test_Lvds_test_pad.html
Lvds/Lvds_test/Lvds_test_Lvds_test_par.html
Lvds/Lvds_test/Lvds_test_Lvds_test_scck.rpt
Lvds/Lvds_test/Lvds_test_Lvds_test_summary.html
Lvds/Lvds_test/Lvds_test_Lvds_test_synplify.html
Lvds/Lvds_test/Lvds_test_Lvds_test_synplify.lpf
Lvds/Lvds_test/Lvds_test_Lvds_test_synplify.tcl
Lvds/Lvds_test/Lvds_test_Lvds_test_tw1.html
Lvds/Lvds_test/Lvds_test_Lvds_test_twr.html
Lvds/Lvds_test/Lvds_test_scck.rpt
Lvds/Lvds_test/Lvds_test_syn.prj
Lvds/Lvds_test/Lvds_test_synplify.lpf
Lvds/Lvds_test/automake.log
Lvds/Lvds_test/backup/
Lvds/Lvds_test/backup/Lvds_test.srr
Lvds/Lvds_test/coreip/
Lvds/Lvds_test/dm/
Lvds/Lvds_test/dm/Lvds_test_Lvds_test_compiler.xdm
Lvds/Lvds_test/dm/Lvds_test_compiler.xdm
Lvds/Lvds_test/hdla_gen_hierarchy.html
Lvds/Lvds_test/launch_synplify.tcl
Lvds/Lvds_test/lvds_test_lvds_test.ior
Lvds/Lvds_test/lvds_test_lvds_test_trce.asd
Lvds/Lvds_test/physical_plus/
Lvds/Lvds_test/physical_plus/syntmp/
Lvds/Lvds_test/run_options.txt
Lvds/Lvds_test/scratchproject.prs
Lvds/Lvds_test/source/
Lvds/Lvds_test/source/Lvds.v
Lvds/Lvds_test/stdout.log
Lvds/Lvds_test/synlog/
Lvds/Lvds_test/synlog/Lvds_test_fpga_mapper.srr
Lvds/Lvds_test/synlog/Lvds_test_fpga_mapper.srr_Min
Lvds/Lvds_test/synlog/Lvds_test_fpga_mapper.szr
Lvds/Lvds_test/synlog/Lvds_test_fpga_mapper.xck
Lvds/Lvds_test/synlog/Lvds_test_premap.srr
Lvds/Lvds_test/synlog/Lvds_test_premap.szr
Lvds/Lvds_test/synlog/report/
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_compiler_notes.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_compiler_runstatus.xml
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_compiler_warnings.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_area_report.xml
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_combined_clk.rpt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_errors.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_notes.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_opt_report.xml
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_resourceusage.rpt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_runstatus.xml
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_timing_report.xml
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_fpga_mapper_warnings.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_premap_errors.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_premap_notes.txt
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_premap_runstatus.xml
Lvds/Lvds_test/synlog/report/Lvds_test_Lvds_test_premap_warnings.txt
Lvds/Lvds_test/synlog/report/Lvds_test_compiler_notes.txt
Lvds/Lvds_test/synlog/report/Lvds_test_compiler_runstatus.xml
Lvds/Lvds_test/synlog/report/Lvds_test_compiler_warnings.txt
Lvds/Lvds_test/synlog/report/Lvds_test_fpga_mapper_area_report.xml
Lvds/Lvds_test/synlog/report/Lvds_test_fpga_mapper_combined_clk.rpt
Lvds/Lvds_test/synlog/report/Lvds_test_fpga_mapper_errors.txt
Lvds/Lvds_test/synlog/report/Lvds_test_fpga_mapper_notes.txt
Lvds/Lvds_test/synlog/report/Lvds_test_fpga_mapper_opt_report.xml
Lvds/Lvds_test/synlog/report/Lvds_test_fpga_mapper_resourceusage.rpt
Lvds/Lvds_test/s

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