oc8051/
oc8051/syn/
oc8051/syn/src/
oc8051/syn/src/verilog/
oc8051/syn/src/verilog/oc8051_ram.v
oc8051/syn/src/verilog/oc8051_rom.v
oc8051/syn/src/verilog/oc8051_cache_ram.v
oc8051/syn/src/verilog/disp.v
oc8051/syn/src/verilog/read.me
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oc8051/.nclaunch.dd
oc8051/sw/
oc8051/sw/source/
oc8051/sw/source/p8051Rom.dpr
oc8051/sw/source/p8051Rom.res
oc8051/sw/source/p8051Rom.dof
oc8051/sw/source/uMain.dfm
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oc8051/sw/oc8051_Rom_Maker.exe
oc8051/sim/
oc8051/sim/rtl_sim/
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oc8051/sim/rtl_sim/src/
oc8051/sim/rtl_sim/src/verilog/
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oc8051/sim/rtl_sim/out/ncvlog.out
oc8051/sim/rtl_sim/out/timer.out
oc8051/sim/rtl_sim/out/lcall.out
oc8051/sim/rtl_sim/out/counter_test.out
oc8051/sim/rtl_sim/out/gcd.out
oc8051/sim/rtl_sim/out/negcnt.out
oc8051/sim/rtl_sim/out/r_bank.out
oc8051/sim/rtl_sim/out/ncelab.out
oc8051/sim/rtl_sim/out/serial_test.out
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oc8051/sim/rtl_sim/run/make
oc8051/sim/rtl_sim/run/make_verilog
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oc8051/rtl/
oc8051/rtl/verilog/
oc8051/rtl/verilog/oc8051_uart.v
oc8051/rtl/