CDN加速镜像 | 设为首页 | 加入收藏夹
登陆 | 会员注册
当前位置： 首页 资源下载 源码下载 其它 书籍源码
收藏

文件名称:VerilogHDL1-9

  • 所属分类：
    source in ebook
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2012-11-16
  • 文件大小：
    7.51mb
  • 已下载：
    0次
  • 提 供 者：
    yuj***
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

包含了许多实用的Verilog模块的代码-it includes many source code written in Verilog
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Chapter-1/adder/adder.cr.mti
Chapter-1/adder/adder.mpf
Chapter-1/adder/adder.v
Chapter-1/adder/adder_testbench.do
Chapter-1/adder/adder_testbench.v
Chapter-1/adder/chart/Thumbs.db
Chapter-1/adder/chart/图1-3.bmp
Chapter-1/adder/chart/图1-4.bmp
Chapter-1/adder/chart/图1-5.bmp
Chapter-1/adder/chart/图1-6.bmp
Chapter-1/adder/chart/图1-7.bmp
Chapter-1/adder/chart/图1-8.bmp
Chapter-1/adder/transcript
Chapter-1/adder/vsim.wlf
Chapter-1/adder/work/adder/transcript
Chapter-1/adder/work/adder/verilog.txt.asm
Chapter-1/adder/work/adder/_primary.dat
Chapter-1/adder/work/adder/_primary.vhd
Chapter-1/adder/work/adder_testbench/verilog.asm
Chapter-1/adder/work/adder_testbench/_primary.dat
Chapter-1/adder/work/adder_testbench/_primary.vhd
Chapter-1/adder/work/_info
Chapter-2/2.1/adder
Chapter-2/2.1/adder.cr.mti
Chapter-2/2.1/adder.mpf
Chapter-2/2.1/adder.v
Chapter-2/2.1/adder_testbench.v
Chapter-2/2.1/chart/Thumbs.db
Chapter-2/2.1/chart/图2-2.bmp
Chapter-2/2.1/chart/表2-1.bmp
Chapter-2/2.1/transcript
Chapter-2/2.1/vsim.wlf
Chapter-2/2.1/wave/adder.bmp
Chapter-2/2.1/wave/adder_testbench.bmp
Chapter-2/2.1/wave/Thumbs.db
Chapter-2/2.1/work/adder/verilog.asm
Chapter-2/2.1/work/adder/_primary.dat
Chapter-2/2.1/work/adder/_primary.vhd
Chapter-2/2.1/work/adder_testbench/verilog.asm
Chapter-2/2.1/work/adder_testbench/_primary.dat
Chapter-2/2.1/work/adder_testbench/_primary.vhd
Chapter-2/2.1/work/_info
Chapter-2/2.2/chart/Thumbs.db
Chapter-2/2.2/chart/图2-4.bmp
Chapter-2/2.2/chart/表2-2.bmp
Chapter-2/2.2/full_add.cr.mti
Chapter-2/2.2/full_add.mpf
Chapter-2/2.2/full_add.v
Chapter-2/2.2/full_add_testbench.v
Chapter-2/2.2/transcript
Chapter-2/2.2/vsim.wlf
Chapter-2/2.2/wave/full_add.bmp
Chapter-2/2.2/wave/full_add_testbench.bmp
Chapter-2/2.2/wave/Thumbs.db
Chapter-2/2.2/work/full_add/verilog.asm
Chapter-2/2.2/work/full_add/_primary.dat
Chapter-2/2.2/work/full_add/_primary.vhd
Chapter-2/2.2/work/full_add_testbench/verilog.asm
Chapter-2/2.2/work/full_add_testbench/_primary.dat
Chapter-2/2.2/work/full_add_testbench/_primary.vhd
Chapter-2/2.2/work/_info
Chapter-2/2.3/adder4.cr.mti
Chapter-2/2.3/adder4.mpf
Chapter-2/2.3/adder4.v
Chapter-2/2.3/adder4_testbench.v
Chapter-2/2.3/chart/Thumbs.db
Chapter-2/2.3/chart/图2-7.bmp
Chapter-2/2.3/transcript
Chapter-2/2.3/vsim.wlf
Chapter-2/2.3/wave/adder4.bmp
Chapter-2/2.3/wave/adder4_testbench.bmp
Chapter-2/2.3/wave/Thumbs.db
Chapter-2/2.3/work/adder4/verilog.asm
Chapter-2/2.3/work/adder4/_primary.dat
Chapter-2/2.3/work/adder4/_primary.vhd
Chapter-2/2.3/work/adder4_testbench/verilog.asm
Chapter-2/2.3/work/adder4_testbench/_primary.dat
Chapter-2/2.3/work/adder4_testbench/_primary.vhd
Chapter-2/2.3/work/_info
Chapter-2/2.4/chart/Thumbs.db
Chapter-2/2.4/chart/图2-10.bmp
Chapter-2/2.4/coun4_testbench.v
Chapter-2/2.4/count4.cr.mti
Chapter-2/2.4/count4.mpf
Chapter-2/2.4/count4.v
Chapter-2/2.4/transcript
Chapter-2/2.4/vsim.wlf
Chapter-2/2.4/wave/coun4.bmp
Chapter-2/2.4/wave/coun4_testbench.bmp
Chapter-2/2.4/wave/Thumbs.db
Chapter-2/2.4/work/coun4_testbench/verilog.asm
Chapter-2/2.4/work/coun4_testbench/_primary.dat
Chapter-2/2.4/work/coun4_testbench/_primary.vhd
Chapter-2/2.4/work/count4/verilog.asm
Chapter-2/2.4/work/count4/_primary.dat
Chapter-2/2.4/work/count4/_primary.vhd
Chapter-2/2.4/work/_info
Chapter-2/2.5/chart/Thumbs.db
Chapter-2/2.5/chart/图2-12.bmp
Chapter-2/2.5/chart/表2-3.bmp
Chapter-2/2.5/count60.cr.mti
Chapter-2/2.5/count60.mpf
Chapter-2/2.5/count60.v
Chapter-2/2.5/count60_testbench.v
Chapter-2/2.5/transcript
Chapter-2/2.5/vsim.wlf
Chapter-2/2.5/wave/count60.bmp
Chapter-2/2.5/wave/count60_testbench.bmp
Chapter-2/2.5/wave/Thumbs.db
Chapter-2/2.5/work/count60/verilog.asm
Chapter-2/2.5/work/count60/_primary.dat
Chapter-2/2.5/work/count60/_primary.vhd
Chapter-2/2.5/work/count60_testbench/verilog.asm
Chapter-2/2.5/work/count60_testbench/_primary.dat
Chapter-2/2.5/work/count60_testbench/_primary.vhd
Chapter-2/2.5/work/_info
Chapter-1/adder/work/adder
Chapter-1/adder/work/adder_testbench
Chapter-2/2.1/work/adder
Chapter-2/2.1/work/adder_testbench
Chapter-2/2.2/work/full_add
Chapter-2/2.2/work/full_add_testbench
Chapter-2/2.3/work/adder4
Chapter-2/2.3/work/adder4_testbench
Chapter-2/2.4/work/coun4_testbench
Chapter-2/2.4/work/count4
Chapter-2/2.5/work/count60
Chapter-2/2.5/work/count60_testbench
Chapter-1/adder/chart
Chapter-1/adder/work
Chapter-2/2.1/chart
Chapter-2/2.1/wave
Chapter-2/2.1/work
Chapter-2/2.2/chart
Chapter-2/2.2/wave
Chapter-2/2.2/work
Chapter-2/2.3/chart
Chapter-2/2.3/wave
Chapter-2/2.3/work
Chapter-2/2.4/chart
Chapter-2/2.4/wave
Chapter-2/2.4/work
Chapter-2/2.5/chart
Chapter-2/2.5/wave
Chapter-2/2.5/work
Chapter-1/adder
Chapter-2/2.1
Chapter-2/2.2
Chapter-2/2.3
Chapter-2/2.4
Chapter-2/2.5
Chapter-1
Chapter-2
Chapter-8.rar
Chapter-9.rar
Chapter-3.rar
Chapter-4.rar
Chapter-5.rar
Chapter-7.rar

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 搜珍网是交换下载平台，只提供交流渠道，下载内容来自于网络，除下载问题外，其它问题请自行百度。更多...
  • 本站已设置防盗链，请勿用迅雷、QQ旋风等下载软件下载资源，下载后用WinRAR最新版进行解压.
  • 如果您发现内容无法下载，请稍后再次尝试；或换浏览器；或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎，请到消费记录里找到下载记录反馈给我们，经确认后退回积分.
  • 如下载前有疑问，可以通过点击"提供者"的名字，查看对方的联系方式，联系对方咨询.
查看所有评论

相关评论

暂无评论内容．

发表评论

*快速评论： 推荐 一般 有密码 和说明不符 不是源码或资料 文件不全 不能解压 纯粹是垃圾
*内　　容：
*验 证 码：
搜珍网 www.dssz.com

浏览历史记录

关闭