搜索资源列表
Core8051s_HB
- Actel最新公布的免费微控制器IP核-Core8051S，在CoreConsole环境使用，完全兼容A51指令，具备APB总线，可配置多种外设。
apb_slave
- AMBA 2.0 APB Example- SRAM -AMBA 2.0 APB Example- SRAM
sc_apbSlave
- systemc写的apb slave程序，用于实现apb总线上的slave-systemc write apb slave procedure used to implement apb bus slave
RTC
- verilog编写的RTC（实时时钟）包含APB总线接口、时钟计时部分等-verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other
LIP1701CORE_system_watchdog
- System watchdog verilog code
APB
- 这是一篇关于APB的源代码，是很好的例子-This is a story about APB' s source code, is a good example of
AHBPAPB
- AMBA总线的AHB+APB源程序，供初学者学习。-Verilog for AHB and APB
ATL-APB-COM
- 使用ATL开发简单的a+b COM组件。包含客户端和服务器端。-Use simple ATL developers a+ b COM components. Contains the client and server side.
apb_bridge
- AMBA AHB总线上连接慢速设备的slave,通过 apb_bridge桥实现AHB到APB的转换-AMBA apb_bridge
aPb
- 运算a+b的小程序，输入a+b，输出其值.-Computing a+b applet, enter a+b, output its value.
APB
- 用C++语言实现计算两个大整型数据的和。-Calculate two big integers and
lab1
- apb transactions with DUT, testbench including interface test cases , top
AMBA-Bus_Verilog_Model
- AMBA-Bus_Verilog_Model with ahb and apb
Lec-7-APB-CaseStudy
- AMBA-APB Case Study, Testing & Verification
apb
- Verilog code for APB Protocol
apb_timer
- Verilog code of timer for APB
ahb2apb-master
- ahb to apb master and slave
ahb2apb_bridge_verification-master
- ahb to apb master verification
apb_uart_sv-pulpinov1
- SystemVerilog 写的APB总线接口的uart 代码，带testbench.(Uart code of APB bus interface written by SystemVerilog, with testbench.)
APB_timer
- 设计一个挂载在 APB 总线上的计数器，按照 APB 的时序给计数器赋值，主 机通过地址对计数器进行配置，通过数据输入端口给计数器设置计数器最大值， 并通过数据输出端口输出计数器的计数值。该设计还设置了一个计数完成信号， 当计数器满足模式配置后的计数要求时，会将该信号拉高(A counter mounted on the APB bus is designed. The counter is assigned according to the sequence of APB The compu