搜索资源列表
mux
- Ciruit Design. A little application for designing a ciruit.
modulemux21
- 2 by 1 mux using verilog
final-project
- Verilog 的Branch和Jump指令的实现 添加了MUX和额外的ALU-Verilog Branch and Jump instructions achieve add the MUX and additional ALU
GPMC
- DM3730 通过GPMC访问FPGA，GPMC配置为数据、地址复用模式。-DM3730 read and write the FPGA device. and GPMC used the MUX mode.
OMAP3730FLASHTOOLS
- DM3730 通过GPMC访问FPGA，且GPMC配置为16位地址数据复用模式。-DM3730 uesd the GPMC port to read and write the FPGA device. the GPMC port setted 16 bit MUX mode.
magnitude-comparator-and-mux
- Magnitude comparator and multiplexer codes in Verilog
mux8to1
- verilog code of 8 to 1 mux
mux8x1
- mux 8x1 in verilog simulated in modesim
7495
- shift register 7495 four d flip flop 5 mux 5495A/DM7495 4-Bit Parallel Access Shift Registers General Descr iption These 4-bit registers feature parallel and serial inputs, parallel outputs, mode control, and two clock inputs. The register
mux
- this code describes 4:1 multiplexer code
UNIVERSAL_SH_REG
- universal shift register using mux and d_ff
mux四选一
- mux四选一及译码器：MUX电路在数字集成电路被广泛使用，作为寄存器或者其他电路的输入选择控制。也是ASIC设计中的基本门电路之一。(MUX four selection one and decoder)
DecoderAndMuxer
- Decoder and Muxer In an archive
263295689sv_mux.tar
- verification of mux using system verilog