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DDFS_verilog
- 直接数字频率综合器,采用ROM压缩法,经过FPGA验证和AISC实现-Direct digital frequency synthesizer, using ROM compression method, validation and AISC through FPGA Implementation
LTE_Link_Level_Simulator_Vehicom
- Vehicom LTE Link Level Simulator -The LTE link level simulator is a comprehensive simulation software used for algorithm development, performance evaluation and system validation associated with LTE systems. The simulator have Matlab and C versions.
