完整的xilinx工程，基于Chipscope的超声波测距调试,每秒产生1个超声波测距模块所需的10us高脉冲激励，并用 chipscope pro查看回响信号-Based Chipscope Ultrasonic Ranging Complete xilinx project，debugging, generating high per 10us pulse required an ultrasonic ranging module incentives and view echo sig

verilog,ISE工程。倒车雷达实例，每100ms产生1个超声波测距模块所需的10us高脉冲激励，并用数码管以16进制数据显示经过滤波处理的回响信号的高脉冲计数值（以10us为单位），与此同时，蜂鸣器根据障碍物远近，也会相应的发出不同频率的响声。-verilog, ISE project. Reversing radar instance, every 100ms high pulse generating 10us required an ultrasonic ranging module

代码功能是实现脉冲信号的死区控制。根据输入脉冲实现10us的死区，避免IGBT直通。(The code function is to realize the dead zone control of the pulse signal. The dead zone of 10us is realized according to the input pulse, and the direct connection of IGBT is avoided.)