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16位乘法器
- 自已写的一个16X16的乘法器，速度比较慢。初学者练习练习！-own writing an audio Multiplier, speed is relatively slow. Beginners practice practice!
mux16x1_2_4x1_qn70
- VHDL examples for 16x16 times, if need detail pls let me know
脉宽测量程序源代码
- 脉宽测量：可以用来测量脉冲宽度，周期技术信号显示从00到FF，共16x16位,Pulse width measurement: can be used to measure pulse width, cycle technology signals from 00 to FF, a total of 16x16-bit
an294_16x16
- Verilog编写的16x16的可交叉的CPLD程序,可用在16个VGA入,16个VGA输出-16x16 cross switch CPLD software wrote by verilog which can be used in 16 VGA input , 16 VGA output application
module000798
- 16x16 bit multiplication verilog code
1616
- 16x16点阵,串行输入，显示“欢”字。-16 x 16 dot matrix
20110507
- LED 16X16閃示燈設計for FPGA-LED 16X16for FPGA control
Cadence-Encounter
- 8x8 mulitplier. created this file using the midelsim softwre. Tested and simulated. Great waveform, so the testbench is included also. Does anybody knkow how to make a 16x16 arrray multiplier?
16X16LED
- 16x16点阵显示程序，及PROTUES仿真通过-16x16 dot matrix display program
lcd
- 实现12864lcd显示自己的学号，每个字为16X16格式。-Achieve 12864lcd show their student number, each word 16X16 format.
FPGA-based-16X16-dot-matrix
- 基于FPGA的16X16点阵去显示汉字，让汉字滚动显示-FPGA-based 16X16 dot matrix to display Chinese characters
hanzi0430
- 基于FPGA芯片，在16x16的点阵上滚动重复显示多个汉字的源代码-Repeated 16x16 dot matrix rolling display the source code of Chinese characters based on the FPGA chip,
16x 16 vedic mulbit
- vedic 16x16 design and teshbench fully working codes..