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mux21a
- 二选一多路选择开关，实现对信号的采集，分类。-Second, the election more than one way selector switch, to achieve signal acquisition, classification.
qingdaqi
- 四路抢答器，超时报警，提前抢答报警，计分等-Answer four, and overtime alarm, warning in advance Answer, including classification
VHDL
- 状态机及其VHDL设计,详细介绍了状态机的基本结构、功能和分类，以及有限状态机的一般设计思路与方法、状态机编码方案的恰当选取、Moore和Mealy状态机的本质区别及设计实现-State machine and the VHDL design, described in detail the basic structure of state machines, function and classification, as well as finite state machine of the
VHDL2
- VHDL的常见问题分类,相信对大家会有所帮助哦,可以下来看看啦,对初学者有帮助更大哦-VHDL FAQ classification, I believe it would be helpful for everyone Oh, could be down to see you, have greater help for beginners Oh
VHDLbaseddesignofmusicplayer
- 在EDA开发工具Quartus II 6.0平台上，采用VHDL语言层次化和模块化的设计方法，通过音符编码的设计思想，预先定制乐曲，实现动态显示乐曲演奏电路的设计，并在此基础上，基于同一原理，使此电路同时具备了简易电子琴的功能，使基于CPLD/FPGA芯片的乐曲播放数字电路得到了更好的优化，提高了设计的灵活性和可扩展性。- Based on the QuartusII-the EDA development tool, this design has adopted the method of
fpga_frequency_circuit_design
- fpga分频电路设计fpga frequency circuit design讲解详细，分频电路的分类等-fpga frequency circuit design fpga frequency circuit design explained in detail the classification of sub-frequency circuit
affine-hull
- 对仿射包 仿射子空间的介绍 很好的讲述的仿射包的建立以及分类方法-Affine subspace of affine package a good introduction to the package about the affine classification of the establishment and
l34_parser
- 报文解析，用来判断是否为正常报文及报文分类-Packet analysis, to determine whether a normal packet and packet classification
alu
- In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit (CPU) of a computer, and even the simplest microprocessors conta
VHDL-language-Detailed
- 《VHDL与数字电路设计》系统介绍涉及数字系统设计的多方面原理、技术及应用。主要内容有数字系统的基本设计思想、设计方法和设计步骤，VHDL硬件描述语言，PLD的结构、原理与分类，数字系统设计开发软件平台QuartusⅡ及其使用，常用数字电路的设计方案等；涵盖现代数字系统设计完整过程的三个支撑方面；硬件描述语言、器件、软件开发平台-VHDL and digital circuit design system introduced many principles, techniques and ap
fft
- 实现功能：基8实现64点FFT处理器（进行两次8点FFT计算，采用基8进行64点） 详细说明：硬件结构包括六部分，分别为输入模块、8点FFT模块、乘法模块、顺序调整模块、输出模块和总控制模块。 其中，输入模块的主要功能是将串行输入的64个数据进行分类，分成8批次，每次8个输入到8点FFT模块中进行计算。 8点FFT模块：FFT是DFT的快速算法，当点数较大时，可以较大的减少DFT的运算量。常用的FFT算法主要有两种，分别为按时间抽选的FFT算法（DIT-FFT）和按频率抽选的FFT算
7054
- Iterative self-organizing data analysis, Relief computing classification weight, NRZ type differential phase modulation signal modeling and simulation analysis.
vwgif
- Based on negative entropy largest independent component analysis, You can achieve data classification and regression pattern recognition, Partially achieved tracking speed iterative relaxation algorithm.
hiisi
- Codec ldpc code implementation Mainly based on the mtlab procedures, Relief computing classification weight.
funfao_v58
- Relief computing classification weight, Computation Method D phononic bandgap plane wave, Energy entropy calculation.
BreastCancer (1)
- breast Cancer Classification
qghhv
- Relief computing classification weight, Complete codec LDPC code, Bottom-pass and band-pass FIR and IIR filter bottom pass and band-pass filter.
666基于FPGA的MVB2类设备控制器设计_幸柒荣
- 本文首先对多功能车辆总线的基本原理进行了简要的概述，接着对其实时协议进行了分析，然后对 MVB2 类设备控制器的功能及其功能模块的划分设计进行了详细的分析；最后对各功能模块进行了编程实现，并给出了仿真验证波形。(Firstly, the basic principle of the multifunction vehicle bus are briefly outlined, then analyze the real time protocol, then carried out a deta