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伪随机序列的说明和源代码
- 可控m序列产生器我分成四个小模块来做，M，M1，M2，M3分别对应为：m序列产生器、控制器、码长选择器、码速率选择器。-controllable m-sequence generator, I divided into four small modules do, M, M1, M2, M3, respectively : m-sequence generator, controller, code-selector, code rate selector.
9B96_EB_V1.0
- ARM Cortex-M3（LM3S9B96） + MAX II CPLD（EPM1270） 实验板原理图-ARM Cortex-M3 (LM3S9B96)+ MAX II CPLD (EPM1270) test board schematic
PN-(2)
- 伪随机序列FPGA 通过仿真 M3-Pseudo-random sequence M3000 FPGA simulation
FFT
- 使用内嵌M3核的FPGA实现FFT的开发-embed the M3 s FPGA for FFT
brstm32mc0910
- Three phase brushless motors (either AC induction or permanent magnet synchronous motors) historically owe their great success in adjustable speed application to the advent of frequency converters and sophisticated control techniques. These high-
SF2_USB_tutorial
- Microsemi SmartFusion2 USB实验教程，包括FPGA和M3两部分程序-Microsemi SmartFusion2 USB experimental curricula, including the two-part program FPGA and M3
AHB2APB_Bridge_example_M7
- Cortex-M3+FPGA AHB2APB桥接设计范例, 核心IP不可读，可用。可以综合，测试。-Cortex-M3+ FPGA AHB2APB_Bridge_example， IP core not readable。
Explore-Cortex-M3-LPC1768-DVB-14001-master
- uart linux development file