搜索资源列表
dispselect
- verilog写的数字频率计的选择模块,用与显示的选择-written in Verilog digital frequency meter option module, used and display options
usb_fpga_1_2_latest.tar
- USB2.0的FPGA内核，使其可以通过FPGA控制CY公司出品的CY7C68013USB微控制器，对USB设备进行读写操作。-• Xilinx Spartan-3 XC3S400 FPGA • High-Speed (480 MBit/s) USB interface via Mini-USB connector (B-type) • Cypress CY7C68013A/14A EZ-USB-Microcontroller • 60 G
spiflashcontroller
- -- This program is free software you can redistribute it and/or -- modify it under the terms of the GNU General Public License -- as published by the Free Software Foundation either version 2 -- of the License, or (at your option) any later ver
m_vhdl
- 设计一个伪随机序列发生器，采用的生成多项式为1+X^3+X^7。要求具有一个RESET端和两个控制端来调整寄存器初值（程序中设定好四种非零初值可选）。-Design a pseudo-random sequence generator, using the generating polynomial 1+ X ^ 3+ X ^ 7. Requires a RESET terminal end and two control registers to adjust the initial valu
cpldkeyboard
- cpld利用学习机键盘输入数据，并在数码管显示出来，而且数码管显示位置可以选择-cpld use of learning machine keyboard input data and displayed in the digital control and digital display location option
selctor
- 二选一的选择输出器....verilog 实现-2 Select an option to achieve the output device .... verilog
XUPV2P_Base_System_Builder
- The Base System Builder (BSB) wizard is a software tool that help users quickly build a working system targeted at a specific development board. Based on the user’ s board selection, BSB will offer the user a number of options for creating
sdram_yadmc.tar
- /* * Yet Another Dynamic Memory Controller * Copyright (C) 2008 Sebastien Bourdeauducq - http://lekernel.net * This file is part of Milkymist. * * Milkymist is free software you can redistribute it and/or modify it * under the terms
Final
- This module contains a digital clock which can enables clock setup option and up to four alarms. This was targeted Virtex-5 FPGA (ML501) and interfaced with LCD display. and center, north and east push buttons.
Zoom-forward-a-relay-relay-network
- 放大转发中继网络中的一种中继选择方案 放大转发中继网络中的一种中继选择方案-Zoom forward a relay relay network relay option to enlarge the network to forward a relay option
Ms32pci
- PCI-ip硬件描述语言-开源的，可以做参考设计，如果需要的话，-This models are written in VHDL! Author is Ovidiu Lupas! MASTER model generates PCI compliant signals checks Target signal compliance with PCI checks data received from Target for correctness generates
music-playing-hardware-circuit
- 使用quartus6.0编写的乐曲硬件演奏电路（选项中没那个软件，所以在这儿注释了）通过按键实现简易音乐的通过蜂鸣器播放。具体的引脚定义这里不好多说什么，选择的芯片不同，引脚锁定也不同，这边用的芯片EP2C6Q240C8-Use quartus6.0 write music playing hardware circuit (option not that software, so here annotated) through the keys to achieve simple music
i2c_master_bit_ctrl
- I2C控制总线主机，按照字节写设计的verilog代码，由于选项中没有verilog这项，因此选择VHDL-I2C control bus master, according to the byte write verilog code design, because the option is not verilog this, so choose VHDL
jt136
- Filtering summation way broadband beamforming, Power System Transient Stability Program, can be transient stability, Monte Carlo simulation method of calculating the American option price and basic descr iption.
4347
- DC-DC power single-part set-loop control, For feature reduction, feature fusion, correlation analysis, Monte Carlo simulation method of calculating the American option price and basic descr iption.
5166
- Monte Carlo simulation method of calculating the American option price and basic descr iption, For feature extraction, signal de-noising, It comprises aircraft flight attitude control, such as slip angle, tilt angle, roll angle, pitch angle.
I2Csalve.v
- Modified I2C salve design 1. Asynchronous design: ASIC or FPGA design option 2. 8 bits CSR RW interface: 0~15, address and control 3. PAD not included 4. Altera CPLD verified
ktqim
- Calculation of growth, entry-level program grains Monte Carlo simulation method of calculating the American option price and basic descr iption, Continuous phase modulation signal (CPM) to produce.