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simple_fm_receiver.tar
- FM收音机的解码及控制器VHDL语言实现,Xilinx提供的.别谢我.-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
ofdm_sch
- GPRS是通用分组无线业务(General Packet Radio Service)的简称,它突破了GSM网只能提供电路交换的思维方式,只通过增加相应的功能实体和对现有的基站系统进行部分改造来实现分组交换,这种改造的投入相对来说并不大,但得到的用户数据速率却相当可观。本实例教授大家GPRS基础知识。
radio.rar
- 本程序演示 :以非利普TEA5767 为核心的,高中频处理,以及立体声解调,高频锁相环为一体的收音程序, 1 支持手动输入频率 频率范围:87。5MHZ - 108。5MHZ 2 自动搜索电台(本程序已经写好,但效果不太理想,有假台) 3 支持电台编号功能(存储电台频率到24C02) 4 支持频率微调 5 支持电台选择 ,This procedure demo: TEA5767 non-Lipkin at the core, high-frequency processin
AM-FM-software-radio
- 用FPGA开发AM,FM接收机的论文,外国人写的,我已实现-FPGA development using AM, FM receiver paper, written by foreigners, I realized
CIC
- CIC IP core实现结构中自动生成的接口代码,基于软件无线电的应用,在毕业论文中已使用过。-CIC IP core to achieve the structure of the interface code automatically generated, based on software radio applications, has been used in the thesis.
cc2420interfacecs
- 对cc2420无线模块的接口。接受到的数据都使用双口ROM的方式与后台核心控制部分传送。-On the CC2420 radio module interface. Receive data using dual-port ROM with the core control part of the background transmission.
shuzisuoxiang
- 数字锁相环(DPLL)技术在数字通信、无线电电子学等众多领域得到了极为广泛的应用。与传统的模拟电路实现的PLL相比,DPLL具有精度高、不受温度和电压影响、环路带宽和中心频率编程可调、易于构建高阶锁相环等优点。-Digital phase-locked loop (DPLL) technology in digital communications, radio electronics, and many other fields has been extremely wide range of
CORDIC
- 数字控制振荡器(NCO,numerical controlled oscillator)是软件无线电、直接数据频 率合成器(DDS,Direct digital synthesizer)、快速傅立叶变换(FFT,Fast Fourier Transform) 等的重要组成部分,同时也是决定其性能的主要因素之一,随着芯片集成度的提高、在信号 处理、数字通信领域、调制解调、变频调速、制导控制、电力电子等方面得到越来越广泛的 应用。-Digital controlled oscilla
clock
- 用VHDL实现的完整数字钟代码,时分秒计时、校时、整点仿电台报时。-Used to achieve a complete VHDL code digital clock, accurate time at school, the whole point of imitation time radio.
Hardware_Speedup_DSP_FPGA
- 现场可编程门阵列(FPGA)已经不再单纯应用在芯片与系统之间的直接互联层,在软件无线电(SDR)中,FPGA逐渐用做通用运算架构来实现硬件加速单元,在降低成本和功耗的基础上提升性能表现。SDR调制解调器的典型实现包括通用处理器(GPP)、数字信号处理器(DSP)和FPGA。而且,FPGA架构可以结合专用硬件加速单元,用来卸载GPP或DSP。软核微处理器可以结合定制逻辑,扩展其内核,也可以将分立的硬件加速协处理器添加到系统中。此外,还可将通用布线资源放在FPGA中,这些硬件加速单元可以并行运行,进
Multi-functionDigitalClock
- 可实现校时,仿电台报时,闹钟,报整点时数-The school can be realized when the fake radio timekeeping, alarm clock, reported that the number of hours the whole point of
verilog
- 本代码设计的是一个通讯系统软件无线电中变换比为5/4的分数倍抽取器,用Verilog编程首先实现4倍内插,再实现5倍抽取。-The code design is a software-defined radio communication system in transformation ratio 5/4 points times the extractor, using Verilog programming the first to achieve four times the inter
zhangjun
- 用硬件描述语言实现数字钟的设计,实现正常计时,报整点时数,电台整点报时,12小时制与24小时制转换等功能。其中有代码和仿真结果-Using hardware descr iption languages digital clock design, implement the normal timing, the whole point, the number of newspaper, radio and the whole point timekeeping, 12-hour and 24-h
tdoa123
- Position location services will not only provide new customer options and products for wireless carriers, but will also provide features that could dierentiate services in dierent markets (i.e., dierentiation between PCS, cellular, and special
quaddecoder_verilog_ise11.2_used_09042010
- Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File. The Pinout is descr ipted in the Constrained file quad.ucf. To use them, y
top_clock
- VerilogHDL编译基本功能具有“秒”、“分”、“时”计时功能,小时按24小时制计时。具有校时功能,能对“分”和“小时”进行调整。扩展功能 仿广播电台正点报时。在59分51秒、53秒、55秒、57秒发出低音512Hz信号,在59分59秒时发出一次高音1024Hz信号,音响持续1秒钟,在1024Hz音响结束时刻为整点。 定时控制,其时间自定; 可任意设定时间的闹钟 自动报整点小时数 小时显示:可切换12小时/24小时显示-VerilogHDL compile the ba
DDC_Ver1.0
- 数字下变频(DDC)在如今基于软件无线电的架构中对系统的整体性能决定性的影响,代码为基于Matlab的4通道DDC程序,程序中可以根据需要调节滤波器等参数评估DDC的性能对于使用FPGA实现DDC有较大的参考价值-Digital down conversion (DDC) in today' s architecture based on software radio system a decisive impact on the overall performance of the code
Radio-TDP-SellSheet
- Xilinx多功能无线通信目标开发平台产品概要,全英文文档,下载前需注意 -introduction of Xilinx Multi-Mode Radio TDP
Modular-Software-Defined-Radio
- 模块化软件无线电接收机 国外论文 讲得很详细-Modular software radio receiver made very detailed study abroad
Software-Defined-Radio-for-OFDM-Transceivers
- Software-Defined Radio for OFDM Transceivers
