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H16550_2[1].0V
- 专门做处理器和周边接口的著名ipcore厂商CAST出品的UART H16550 ，包含完整的使用说明手册、testbench、可综合，如果被网站认可，将继续上传其余的几个更好的core。-specialized processor and peripheral interfaces famous ipcore CAST product manufacturers UART H16 550, including full use manual testbench can be integrate
hanmin
- 4位汉明编译码源代码。VHDL格式，经过仿真和测试通过，请放心使用。-four Hamming encryption source code. VHDL format, through simulation and test pass, please rest assured that use.
AEScoremodules
- AES decoder aes_dec.vhdl AES encoder aes_enc.vhdl Package used by rest of design aes_pkg.vhdl Key Expansion component for AES encoder and decoder key_expansion.vhdl -AES AES encoder decoder aes_dec.vhdl aes_ enc.vhdl Package used by rest
fpga-dm9000a
- 一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SD
voicetongxindianlu
- 语音通信电路完整的程序设计。里面是所有的源文件都经本人测试可以用，放心下载吧-Voice communications circuit design procedures. Inside are all the source files have been tested, I can use, rest assured that you download
USBandFPGAjiekou
- USB与FPGA接口的程序设计。里面是所有的源文件都经本人测试可以用，放心下载吧-USB interface with the FPGA programming. Inside are all the source files have been tested, I can use, rest assured that you download
fastpicturesystem
- 高速图像采集系统完整的程序设计。里面是所有的源文件都经本人测试可以用，放心下载吧-High-speed image acquisition system complete the design process. Inside are all the source files have been tested, I can use, rest assured that you download
I2CVerilog
- VerilogHDL 实现了I2C 文件中包含六个程序 第一个为主程序 其余为子程序 -VerilogHDL achievement of the I2C document contains procedures for the first six the rest of the main program for the subroutine
key44
- 4*4按键扫描VHDL程序 在开发板上调试成功,放心使用 -4* 4 keypad scanning process in the development of on-board VHDL debugging success, rest assured that the use of
xulie
- 这是一个用VHDL编写的用以通过串到并的转化发送序列，程序调试完全正确，请放心使用-This is a VHDL prepared for use through the string and the conversion to send the sequence program debugging completely correct, please rest assured that the use of
presentar
- Verilog code calculator, add, rest, multiply, and increment-Verilog code calculator, add, rest, multiply, and increment
CRCecoder
- CRC 编码的Verilog语言，高手的作品，放心下-CRC-coded Verilog language, master' s works, rest assured that the next
sell
- 自动贩卖饮料机的Verilog语言，高手的作品，放心下-Beverage vending machines Verilog language, master' s works, rest assured that the next
11FIRfliter
- 11阶FIR滤波器和（7，4）编码器的Verilog语言，高手的作品，放心下-11-order FIR filter, and (7,4) encoder of the Verilog language, master' s works, rest assured that the next
AD_TLC549_TEST
- 基于VHDL语言的AD--TLC549的实验方案，已经通过验证，可以放心使用-Based VHDL language AD- TLC549 experimental program has been validated, you can rest assured that the use
VGA_1024_768
- VGA入门实例，已通过验证，可放心下载，在VGA上显示彩条.-VGA entry instance, has been validated, can rest assured that download, the VGA display of color.
cordic
- cordic算法实现的核心代码，老外写的。我已经验证过了，是完全可以使用的！请大家放心下载。-cordic algorithm of the core code, written by foreigners. I have verified, is not fully used! Please rest assured to download.
fsh
- 这是我的毕业可用8位的LED显示，有小数点的。设计哦，可以用的。可供参考-VHDL-based digital frequency meter With the rapid development of electronic technology, FPGA/CPLD appear in its high-speed, high reliability, series parallel mode of outstanding merit widely used in the electronic
Sum_Rest_BCD
- VHDL Sum and Rest BCD
12.4Uart
- 最简单的verilog串口发送接收源代码,已经上机调试,请放心,直接使用-Simple transmit and receive serial verilog source code, has been on the machine commissioning, please rest assured, direct use