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  1. fpga

    1下载:
  2. 基于现场可编程门阵列( Fie ld Programmab le Ga teA rrays, FPGA )硬件平台和背景差分算法设计一个静态背景下 的视频移动目标检测与跟踪系统, 并详细给出系统的实现过程。检测结果表明: 采用FPGA硬件实现系统设计, 极大地提高了 系统的处理速度, 在静态背景下, 可以实时、准确地检测和跟踪到移动目标。-Based on field programmable gate array (Fie ld Programmab le Ga teA rrays,
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:569427
    • 提供者:chdj
  1. tea

    0下载:
  2. T. encryption. unsolved
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:329543
    • 提供者:frank90
  1. encrypt_8

    0下载:
  2. This vhdl source is top level entity. TEA algorithm to encrypt 8-bit data.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-11
    • 文件大小:656
    • 提供者:Mar Mar
  1. encrypt_8_tea_complete

    0下载:
  2. This complete project for 8-bit TEA algorithm. Actually, at least 32-bit for TEA and you can change number of bits. This folder consists of five vhdl files. one top level entity named encrypt_8 and the remaining four are low level entities.-This is c
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-14
    • 文件大小:4162
    • 提供者:Mar Mar
  1. decrypt_8

    0下载:
  2. This file is top level entity of decrypt_8 project. This project is 8_bit decryption for TEA algorithm. You can change number of bits (at least 32 bit for TEA). This project is only for one round. You should use input as encryption output so that you
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:909
    • 提供者:Mar Mar
  1. v

    2下载:
  2. Synthetisable verilog of compact crypto algorithms: RC4, TEA, XTEA, XXTEA. A faster but, more resource hungry version for RC4 and XXTEA is included.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2015-12-10
    • 文件大小:62464
    • 提供者:zardoz
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