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lightW
- 一個LCD燈的小程序。不是我寫的。我只負責了調試。適用在ACEXEP1K30QC208-3上。我跑了SIMULATOR，管腳連接標示了。我也下在電路板上試過了，沒有問題。要用到實驗板上的兄弟們把CLK1改到TESTOUT3或者0就好了。綫幫助新手，人人有責。-a small LCD lights procedures. I did not write. I am only responsible for the debugging. Apply in ACEXEP1K30QC208-3 on.
基于FPGA的AM调制
- 基于FPGA的AM调制
AM-FM-software-radio
- 用FPGA开发AM，FM接收机的论文，外国人写的，我已实现-FPGA development using AM, FM receiver paper, written by foreigners, I realized
MC1496
- 使用MC1496实现AM调制的PDF格式说明书。-AM modulation using MC1496
AM
- FPGA内AM调制工程。内带调制波、载波生成。关键词：FPGA verilog AM DDS-AM modulation works within the FPGA. Within the band modulation wave generated carrier. Key words: FPGA verilog AM DDS
dds_final
- 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
dayin
- 该程序利用vhdl语言，采用查表法实现am调制，此方法简洁又有效-The program using vhdl language, using look-up table method to achieve am modulation, this method is simple and effective
AM
- AM信号的调制解调DSP算法，包括原理和应用-AM
fpga
- 基于FPGA的信号调制，可产生正弦波，并进行ASK调制和AM调制-FPGA-based signal modulation, can produce sine wave, and the ASK modulation and AM modulation
AM_DE
- AM信号解调的FPGA实现。用VHDL编写，验证通过的-discribe the AM,tell you hwo to use it.
DDS(fsk-ask-psk)
- 基于VHDL的波形调制，其中包括调频、调幅，调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
I2C
- this vHDL code for I2C RTC i am usinf de2 board FPGA PLATFORM-this is vHDL code for I2C RTC i am usinf de2 board FPGA PLATFORM
eda
- 南京理工大学EDA实验多功能数字钟+闹钟+dds+am调幅。-Nanjing University of EDA test multifunction digital clock+ alarm+ dds+ am AM.
DAC908-AM-FM--sinsin
- 基于FPGA的DDS发生器以及AM、FM模拟调制-The DDS generator and FPGA-based AM, FM analog modulation
DDS
- 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
AM
- Quarus环境下用VHDL语言和IP核实现AM调制-Realization of AM with VHDL and IP core under Quartus environment
am
- 基于FPGA的用verilog语言写的，改程序可产生不同调制系数和不同频率的AM波，长按按键切换调制度25 、50 、75 和短按按键切换调制信号频率1k、1.5k、2k、2.5k.-Based on the FPGA using verilog language, change the program can produce different coefficients and different frequency modulated AM wave, long press the butt
am
- 利用altera的cyclone FPGA芯片，实现AM调制，并使用自带的逻辑分析仪仿真成功。-The use altera cyclone FPGA chip, AM modulation, and use its own logic analyzer successful simulation
am-wave
- AM波的vhdl方法实现，quartusii上亲测。图形法-AM wave VHDL method to achieve, QuartusII on the pro test. Graphic method
AM调制解调
- 基于Artix-7 FPGA的AM调制解调代码，从AD读入信号后，进行AM调制，并解调输出（将代码分成两个工程就是AM的调制和解调），其中解调用到的数字滤波采用MATLAB设计(The AM modulation and demodulation code based on artix-7 FPGA, after reading the signal from AD, carries out AM modulation, and demodulates the output (the code