搜索资源列表
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
PS2-controller
- 基本AMBA APB总线的PS/2接口控制器，可以实现对PS/2键盘和鼠标的控制。-A PS/2 controller based on AMBA APB protocal,which can control the PS/2 keyboard and mouse.
ApbGPIO
- PowerFull Apb GPIO Controller
APB
- It s the verilog source code for AMBA APB 2.0 Slave
a_vhdl_8253_timer_latest.tar
- 一个apb总线控制8253的verilog源代码，符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
ApbTimer
- PowerFull Apb Timer Controller
ahbapb
- AMBA2.0标准的AHB2APb桥，代码通过验证-AMBA2.0 standard AHB2APb Bridge, through the verification code
apb2ahb
- verilog code for apb to ahb convert
au
- 基于APB总线的uart控制器，包括源码和vcs脚本-UART controller based on AMBA APB
eth
- 一个ahb接口的千兆以太网MAC，包括apb的配置接口-Ahb a Gigabit Ethernet interface MAC, including the configuration interface apb
I2C
- iic总线挂接在amba的apb总线上，标准接口，verilog代码的实现-iic bus attached to the amba' s apb bus, standard interfaces, verilog code implementation
AHB2APB_bridge
- 倍频算法实现了AHB-to-APB桥接器-An ahb2apb bridge with doubling algorithm
apb
- These are the files of apb verification environment. Some of them are useful as a reference for creating the other verification environment.
Ahb2Apb
- AHB总线协议转APB总线协议的接口IP，使用Verilog代码实现，有详细的英文注释(AHB bus protocol turn APB bus interface IP, use Verilog code implementation, and have a detailed knowledge of the English comments)
apb.v
- AMBA总线apb总线的verilog代码以及相关的中断控制。(AMBA bus apb bus verilog code and associated interrupt control.)
apb
- APB 总线。可以实现单个数据在总机与从机之间的读写功能(This can achieve the read and write functions of a single data between the master and the slave .)
apb_uart
- 带apb接口的uart,带testbench，测试过，可以使用(The uart module with apb interface)
ARM_AMBA3_APB
- apb protocol specification
apb_uart
- 这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)
apb_timer.tar
- 是基于apb总线下的timer外设的rtl代码，主要包括apb_timer的master逻辑verilog，以及相应的开发文档，包括寄存器的描述，功能特性等。(RTL code is based on timer peripheral under APB bus, which mainly includes master logic Verilog of apb_timer and corresponding development documents, including the descr