搜索资源列表
miaobiao
- 完整的的倒计时秒表设计（指示带闪烁）ＶＨＤＬ代码，Ｑuartus 2开发环境，Archive文件，在Ｑuartus2解压即可。
用verilog语言编写的按键控制流水灯实验程序
- 用verilog语言编写的按键控制流水灯实验程序。通过3个按键可以分别控制流水灯的亮灭、左移、右移。压缩包内也包含此按键控制流水灯实验程序的modelsim仿真文件。-Verilog language with control buttons light water experimental procedure. By three buttons can control the light water lights off, left, right. This archive also cont
NandFlash-FPGA-controller(ECC)
- 该压缩包包括NAND FLASH（美光）的FPGA控制器的原理及VHDL源码，非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
divider
- verilog HDL编写的浮点除法器，编译通过，可综合。压缩包包含三个文件。-verilog HDL write floating-point divider, compile, can be integrated. Archive contains three files.
xapp851
- The xapp851.zip archive includes the following subdirectories. The specific contents of each subdirectory below: \rtl - HDL design files \sim - simulation files \synth - Synthesis related files \par - Place/Route related files-The xapp
MultiCLKCPU
- 本设计实现了多周期CPU的设计，运行环境是quatrus2；该多周期CPU可以处理22条32位指令（具体指令见源码，绝不坑人）。压缩包内含有源代码，程序模块表和实验报告以及详细的设计图，是学习verilog的好材料啊。-The Design and Implementation of a multi-cycle CPU design, operating environment is quatrus2 the multi-cycle CPU can handle 22 32 instructi
Advancedcontrolsystems
- archive of advanced control systems
i2c
- 该压缩包包含了i2c core设计需要的文献资料以及verilog编写实现i2c通信的源代码-The archive contains the i2c core design requires the preparation of literature and the verilog source code to achieve i2c communication
i2c
- 该压缩包包含了i2c core设计所需的详细时序说明书以及用verilog编写的core的源代码、仿真模块。-The archive contains the i2c core design specifications required for the detailed timing and preparation of the core with the verilog source code, the simulation module.
ModelsimVHDLWatch
- This tutorial is a part of a series of tutorials provided by Xilinx to lead the user through the Xilinx FPGA Design Flow. This archive contains the necessary design files to perform the tutorial.-This tutorial is a part of a series of tutorials p
FSM
- 压缩包中包含了FSM三段式的写法和利用三段式写的一个程序实例。-FSM archive contains three stages of writing and write a program using three-step examples.
EDA
- 本压缩包收集了密码锁案例，含程序源码 报告等东西-Ben archive collection of 150 classic C, C++ programs and topics, source code, is a collection of values
New-WinRAR-archive
- A VHDL code to program a counter from 0-2-A VHDL code to program a counter from 0-255
www
- 完整的基于fpga的数字时钟的设计与实现，压缩文档是整个文档，其中的zzz，zzz1，zzz2，zzz3不同情况下的顶层原理图-Complete digital clock fpga based design and implementation, the archive of the entire document, which zzz, zzz1, zzz2, zzz3 different top-level schematic case
filter
- Digital filter 1-st level project. Xilnx System Generator sources + verilog sources (PlanAhead project). All docs are in archive. Fully work.
obnar1
- Digital detector (a-type) 1-st level project. Xilnx System Generator sources + verilog sources (PlanAhead project). All docs are in archive. Fully work.
obnar3
- Digital detector (b-type) 1-st level project. Xilnx System Generator sources + verilog sources (PlanAhead project). All docs are in archive. Fully work.
Archive
- 几个FPGA开发板上的实验源代码，值得参考学习！-Several experiments on the FPGA Development Board source code, it is also useful to learn!
New-WinRAR-ZIP-archive
- snake game with two backgrounds-snake game with two backgrounds
Archive
- i enclosed the win socket