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- 应用VHDL语言写的倍频器,通过对高频信号的分频得到较低频率信号的倍频-Applications written in VHDL multiplier, high-frequency signals through low frequency signal divided by the frequency
LKB001-U1-LK650-06
- 16通道高速DI数据采集模块程序,采用verilog 编写,quartus,cyclone EP1C3T1-high LVDS comm DI module hollysys bei jing quartus verilog
