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  1. cis_100dpi_dsp

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  2. 程序实现了采用CIS+AD9822+FPGA的结构形式对人民币进行采集。然后把采集到得数据通过EMIF接口传送给DSP。已通过调试-Program implements the use of CIS+ AD9822+ FPGA structure in the form of the RMB is collected. Then the data collected was transmitted through the EMIF interface to the DSP. Has passed
  3. 所属分类:VHDL编程

    • 发布日期:2014-01-27
    • 文件大小:3069990
    • 提供者:袁官福
  1. 3Channel_CIS_Processor_with-VHDL.ZIP

    0下载:
  2. This usefull source for control CIS Sensor and has fallowed functions 1) Read image data frome 3channel 200dpi CIS Sensor 2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition 3)Psudo Video Ram Read by
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-27
    • 文件大小:15623
    • 提供者:jeong
  1. vidiocpt

    0下载:
  2. 本代码为富士通MV86S02的CMOS图像传感器的VHDL驱动代码-The code for Fujitsu MV86S02 the CMOS image sensor-driven VHDL code
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:138787
    • 提供者:王志杰
  1. fpgacis

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  2. 主要是通过使用FPGA利用CIS(接触式图像传感器)进行图像采集,通过AD转换之后把数据存储到FPGA里面开辟的FIFO-Mainly through the use of FPGA utilization of CIS (non-contact image sensor) image acquisition, through the data storage after AD transform to open the FIFO FPGA inside
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-03
    • 文件大小:1097260
    • 提供者:袁官福
  1. lowpowerfir

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  2. This project was undertaken to produce a low power FIR filter for inclusion in a VHDL target library. The design was completed using OrCAD s Capture CIS, from this the VHDL code has been extracted. This method has allowed complete testing of the syst
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-28
    • 文件大小:447471
    • 提供者:Nagendran
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