搜索资源列表
SPI
- 基于FPGA的SPI控制器的设计，有代码和相关文档资料-the design of SPI controlor ,including verilog codes and other documents
turbodecoder
- 用vhdl实现turbo码的迭代解码，转某N人的程序-Using vhdl implementation of iterative decoding turbo codes, transfer of a person' s procedures for N
FDWT
- it explains the ID DWT concepts. and the codes are in VHDL and MATLAB
ViterbiDecodeK9R12HardDecision
- viterbi 硬判决译码，基本实现了（2，1，9）卷积码的硬判决译码，用modelsim RTL仿真通过-hard-decision viterbi decoding, the basic realization of the (2,1,9) convolutional codes hard decision decoding, using modelsim RTL simulation through
P8051
- This a FREE tool chain which compiles C codes into 8051 binary code, converts the binary to RTL ROM, and simulate in Modelsim. SDCC is the compiler. Example compilation: cd compile sdcc --iram-size 0x80 --xram-size 0x800 t8051.c RE
16bitFFTFPGA
- 16位定点FFT-DSP的FPGA实现(相关代码和使用说明)-16-bit fixed-point FFT-DSP implementation of the FPGA (the relevant codes and instructions)
uart
- 基于FPGA的uart源代码，异步串行通信，vhdl书写的。-uart codes。write with vhdl.
fpga64_027
- VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-one fpga board.
conv_enc
- 这是一个用VERILOG HDL编写的卷积码程序-This is a VERILOG HDL with the preparation of procedures for the convolutional codes
sdram32
- DDR SDRAM source verilog source codes
VHDL_Codes
- vhdl codes for counters and shift registers
IR
- 红外线接收: 使用任何遥控器（电视、空调等），对准开发板的红外线接收管，按下遥控器的任何按钮，LED0 会按照红外线码进行闪烁。 -Infrared receiver: the use of any remote control (TV, air conditioning, etc.), targeting the development board infrared receiver tube, press any button on the remote control, LED0 wi
FIR
- fir filter design using vhdl codes
codes
- i have included some verilog codes
WIRELESS
- This file contains source code for DS-CDMA transciver using VHDL. it is having two source codes one is for Transmitter and another is for reciever programme.
Bch15_5
- The attached file consists of implimentation of BCH codes in VHDL programming using XILINX software. This code will reduce the no. of gates requirement.
VerilogLabSource
- Verilog Lab Source Codes
communicationFPGADesign
- 包含matlab和Verilog两中代码：主要功能是关于无线通信的-contain：matlab and Verilog codes about communication
VHDLcodes
- Behavioral descr iption of ALU, RAM MODULE, ROM MODULE, DIVIDE BY N COUNTER, GENERIC DIVIDER 2n+1, GCD CALCULATOR, GCD FSM CODE, JK FLIP FLOP in VHDL . These are fully synthesized codes with optimization.- Behavioral descr iption of ALU, RAM MODULE,
verilog_codes_for_UG
- Verilog Basic Codes for Beginners -Verilog Basic Codes for Beginners .....