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frequency_counter_2(successful)(top-down design).r
- 小巧的频率计数器，VHDL源代码和仿真文件具全，直接从管工程文件拷贝过来。绝对可用。-compact frequency counters, VHDL source code and simulation with all documents directly from the control engineering documents copied. Absolutely available.
CPLDOGRAM
- 摘要: 文中介绍了数字频率计的结构、工作原理及计数方式，给出了基于VHDL语言的频率计系统的行为源描述，讨论了在VHDL的高级综合系统QuartusII的支持下，自顶向下地进行传输模块的设计工程，并给出了系统的仿真波形以及其应用实践。-Abstract : This paper introduces a digital frequency of the structure and working principle and counting, is based on VHDL Frequency
UltraCTR
- ULTRACTR的源码，xps工程实现，基于PPC平台-ULTRACTR source code, xps engineering, based on the PPC platform
lab2_tutorial
- 摘自university of waterloo的个别知道笔记，主要关于electrical and computer engineering方面，包括了8-bit hamming的编解码以及使用VHDL的硬件开发
sopc_cpu
- 此例程是基于FPGA的SOPC工程实例，是对CPU操作运用的一个很不错的程序，内有modelsim仿真激励，都是测试过的好程序-This routine is FPGA-based SOPC engineering practice, the use of CPU operation is a very good program, there modelsim simulation stimulus, good procedures are tested
DupalPortRam.rar
- 基于quartus的双端口RAM的完整设计流程，包括建立的工程仿真实现,Quartus-based dual-port RAM of the integrity of the design process, including the establishment of the Engineering Simulation
fpga-dm9000a
- 一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SD
lab1_VHDL
- VHDL数字系统设计工程实践，包含实验的原理，真值表和结构图描述，以及相关的VHDL代码。-VHDL digital system design engineering practice, including the principle of the experiment, truth table and chart descr iptions, and associated VHDL code.
AD5624
- ADI公司串行DA芯片AD5624的VHDL源码，实际工程应用成功、-ADI Corporation serial DA of the AD5624 chip VHDL source code, the actual engineering application success
FSMLibrary
- 有限状态机源码，最近在做一个项目需要用到状态机，自己研究了一下，将原来的状态机封装了，做了一些修改，实现了一个比较好用的状态机。里面包括测试工程，用例-Finite state machine source code, most recently doing a project needs to use state machines, their study a little, the original state machine package, and made some modificat
lab2_VHDL
- VHDL数字系统设计和工程实践1，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.
PWM_moto_ctrl
- verilog 代码实现 直流电机PWM控制 内有整个完整工程 和modelsim仿真文件-verilog code for PWM DC motor control to achieve within the whole integrity of engineering and modelsim simulation files
VGA(FPGA)
- 基于FPGA的VGA工程文件以及相应的参考资料-FPGA-based VGA engineering documents and the corresponding reference
SDRAM
- SDRAM控制器，Verilog代码编写，让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和学习笔记-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
SDRAM_CONTROLlER_Modelsim
- SDRAM控制器，Verilog代码编写，让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和文档-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
Uart_Send
- UART的完整发送程序，包括完整的工程核源代码。-UART to send the complete procedure, including the complete source code of nuclear engineering.
vhdl_source
- 硬件编写语言，很多VHDL源码例程，纯文本，可直接用在工程中-Hardware language, VHDL source code a lot of routines, plain text, can be directly used in engineering
DE2_TV
- 基于DE2 development board的工程用来显示N制的电视信号。-DE2 development board based on the engineering system used to display television signals N.
Quartus2_VerilogRoutine
- 该文档是基于QUARTUS2_6.0的Verilog试验例程，其中附有工程源码，对于初学者是最好的例程！它是本人花费一年多自学后写的例程，以便初学者入门，里面附有很多图解，很详细！-The document is based on the Verilog test QUARTUS2_6.0 routines, including an engineering source code, for beginners is the best routine! It is, I spent more
dp_test
- 本程序是用VHDL语言编写的，其中包括并口通讯，DDS电机调速,编码器信号处理等，对研究这方面的工程人员有一定参考作用-This procedure is used VHDL language, including the parallel port communication, DDS motor, encoder signal processing and so on, to look at this area of engineering staff have a certain refe