搜索资源列表
rtl
- 用verilog编写的网卡芯片rtl级。前仿后仿都通过了，可以在modelsim上运行察看-verilogrtl After the former imitation through imitation, it can run on the look modelsim
uart from opencores
- 用VHDL实现串口 可以实现与pc机的通信 收发 中断都可以 效果比较好-VHDL implement serial port, it can communicate with pc, it can accept and send message, and it can be interrupted.
CORDIC
- 用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.
and_or
- veilog 代码 用户可以直接调用，作为底层模块。同时已经编译成功，可以作为基本单元库。-veilog code user can derict use it for the base mode.
16位16个精简指令RISC单片机IP
- 16位16个精简指令RISC单片机IP,对于想学习学习处理器内核、编写自己的微处理器的朋友有帮助。-16 bit RISC MCU IP with 16 ops,if you want to study how write your own MCU down,you can get help with it.
buffer_display
- buffer_display是4X4KEYPAD的输出显示模块。可以显示6个连续的按键-buffer_display is 4X4KEYPAD output module. It showed six consecutive Press
cpu16
- 一个16位cpu的vhdl代码。具体内容我也不清楚，自己慢慢研究吧-a 16 cpu of VHDL code. Specific content is not clear to me that their study it slowly
rd1014
- SDRAM控制器,对SDRAM进行页写和对SDRAM进行页读的快速读写。是一个很好的SDRAM控制器-SDRAM controller, SDRAM to write for pages and pages of SDRAM for fast reading literacy. It is a very good SDRAM Controller
CPUverilog
- pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.
双路脉冲发生器（veralog）
- Verilog HDL 程序 双路脉冲发生器的代码 包含了键盘控制，LED显示，脉冲发生，脉冲频率测量模块 是我自己写得，希望能对你有帮助，有问题可以mail：shaojunwu1@163.com-Verilog HDL dual-channel pulse generator procedure code includes a keyboard control, LED display, pulse, pulse frequency measurement module is wr
抢答器
- 扳动定义为“开始”（即enable）的开关后，一排指示灯变亮，之后抢答开始，有4个扳动开关代表4个抢答器，数码管将显示出最先被扳动的开关的序号，同时发出声音，表示抢答成功。若未按“开始”前，有任意开关被扳动，则数码管显示被扳动开关的序号，并发出另一种声音，表示有人抢答。-reached for the definition of "start" (enable) the switch, a row of bright lights changed, after Respond
Sparc_leon_VHDL
- 一个航天航空用的Sparc处理器（配美国欧洲宇航局用的R_tems嵌入式操作系统）的VHDL源代码，但不能保证版图设计ASIC成功 -the Sparc processor (fitted with the United States of the European Space Agency R_tems Embedded operating system) VHDL source code, but it can not guarantee success ASIC Layout
8051inVHDL
- 一个8051的VHDL代码，可完整编译， 但不保证版图映射成功，可作为设计微处理器的参考-a 8051 VHDL code can be compiled integrity, but it does not guarantee success territory mapping, the microprocessor can be used as a reference design
Lab_ISE_Led
- vhdl实例教程，其中的例子适合新手演示使用，肯定会有帮助的。-VHDL example tutorial, an example of the use for novice demo, it will certainly help.
ACCUME
- 强调Verilog代码编写规范，经常是一个不太受欢迎的话题，但却是非常有必要的。 每个代码编写者都有自己的编写习惯，而且都喜欢按照自己的习惯去编写-stressed Verilog code-writing norms, is often not a popular topic, but it is very necessary. Each has its own code writers in the preparation habits, but like their own habit
calendar_clock
- 用verlog HDL写的电子日历,可以显示年,月,日和时间,具有闹铃的功能-using HDL to write electronic calendar, it shows the year, month, day and time, with alarm function
2Dfft
- VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-mo
dianti
- Verilog在maxpuls2下开发的电梯控制器的文档（包括代码），其中说明十分详尽-Verilog maxpuls2 under development in the elevator controller files (including code), It showed very detailed
Automat
- 设计一个自动售货机控制程序，它的投币口每次可以投入1元、2元、5元，且规定投入1元或2元后不得再投入5元。当投入总值等于或超过设定值（4元），售货机就自动送出货物并找回多余的钱。-design a vending machine control procedures, it can slot into each one yuan, the two yuan, 5 billion there are provisions into one yuan or two yuan may re-enter
plane_game
- 此为一用VHDL编写的硬件游戏程序，在16*16的点阵上实现了打飞机游戏，可以打飞机，也可以把飞机躲过去。挺有意思的。-this as a preparation using VHDL hardware Games, 16 * 16 in the lattice achieving an aircraft game, it could have aircraft and the aircraft can escape to. Quite interesting.