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hssdrc_latest.tar.gz
- HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is li
MIT_Video-Scaler
- MIT的video scaler论文，文章后面附有c和verilog程序源代码，分为水平缩放和垂直缩放-MIT video scaler papers, articles, source code attached to the back, divided into horizontal scaling and vertical scaling
MIT_Press_Circuit_Design_with_VHDL(2007)
- MIT Press出版的，书名是Circuit Design with VHDL(2007)，相信很有用的-MIT Press- Circuit Design with VHDL(2007)。It is of great importance for you!
MIT_Press-Circuit_Design_with_VHDL(2005)
- MIT Press - Circuit Design with VHDL (2005)
1MEMOCODE4_dave_contest
- Hardware Acceleration of Matrix Multiplication a Xilinx FPGA Nirav Dave, Kermin Fleming, Myron King, Michael Pellauer, Muralidaran Vijayaraghavan Computer Science and Artificial Intelligence Lab Massachusetts Institute of Technology Cambridge
MIT
- MIT Press - Circuit Design with VHDL (2005)
MIT.Press-.Circuit.Design.with.VHDL.(2004).TLF.ra
- This book is a good reference for VHDL Programming. this book is divided into two parts Circuit Design and System Design
MIT[1].Press_.Circuit.Design.with.VHDL._2004_.TLF
- This verilog vending machine code. We can eat beverage and soda with only $1.25-This is verilog vending machine code. We can eat beverage and soda with only $1.25
MIT-Press---Circuit-Design-with-VHDL-(2005)
- MIT Press - Circuit Design with VHDL (2005) ....
MIT-Press-Circuit-Design-with-VHDL
- MIT大学VHDL设计讲义，数字电路设计经典教程-VHDL design at MIT lecture notes, tutorial digital circuit design classic
ps_ms
- 在PS2-MS接口上接上PS2鼠标，当设计文件加载到目标器件后，在数码管上显示鼠标的座标值，移动鼠标座标值会发生改变。按复位键座标值回到起始座标。-In der PS2-MS-Interface mit dem PS2-Maus, wenn die Design-Datei in das Zielgerä t geladen wird, die digitale Rö hre die Maus-Koordinaten anzuzeigen, bewegen Sie die Mau
pin-lv-ji
- 设计的是一个数字频率计，通过八个七段数码管显示频率值。系统时钟选择的50M的时钟，闸门时间为1s（通过对系统时钟进行分频得到），在闸门为高电平期间，对输入的频率进行计数，当闸门变低的时候，记录当前的频率值，并将频率计数器清零，频率的显示每过2秒刷新一次。被测频率通过一个拨动开关来选择是使用系统中的数字时钟源模块的时钟信号还是从外部通过系统的输入输出模块的输入端输入一个数字信号进行频率测量。当拨动开关为高电平时，测量从外部输入的数字信号，否则测量系统数字时钟信号模块的数字信号。（附详细PDF文档介
PS2_kb
- 利用PS2接口将键盘按键的通码在数码管上显示出来-PS2-Schnittstelle mit Hilfe der Tasten durch den Code auf der Sieben-Segment-LED-Display
Circuit-Design-With-VHDL-MIT-Press-eBook
- Learning VHDL from scratch. Great book.
yui_v68
- MIT Artificial Intelligence Laboratory identification of the target source, Bayesian parameter estimation principle mixed logit model, Various resource allocation algorithm.
vctqf
- Course designed to prepare the matlab program code, MIT Artificial Intelligence Laboratory identification of the target source, Nonlinear discrete system identification.
fen_v67
- MIT Artificial Intelligence Laboratory identification of the target source, There CDF trigonometric curve / 3D graphs, Can realize the two-dimensional data clustering.
tpjpr
- Use matlab intelligent predictive control algorithm, MIT Artificial Intelligence Laboratory identification of the target source, Undergraduate complete set requirements refer to the standard test models.
tj371
- MIT Artificial Intelligence Laboratory identification of the target source, Automatic identification in the matlab environment the size of the connected area, Target can be extracted in a picture you want.