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DE0_NANO_GSensor
- 该代码利用DE0 nano上面的ADI ADXL345三轴重力传感器实现重力感应，根据偏转角度的不同点亮相应方向上面的LED灯，稍加修改，还能够将各个方向上面的重力加速度值实时显示，希望大家喜欢-The code used DE0 nano gravity above the ADI ADXL345 three-axis accelerometer sensors to achieve according to the deflection angle of light in different
Actel_Igloo_nano_UART
- This FPGA project include a simple version of the UART for Actel Igloo nano.
Libero8.5_UG
- Libero集成设计环境(IDE)8.5版本，这套完整的软件设计工具系列已进一步扩展，支持新近推出的nano版本IGLOO和ProASIC3现场可编程门阵列(FPGA)。-Libero Integrated Design Environment (IDE) 8.5 version, this complete series of software design tools have been further expanded to support the recently introduced
Nano-tube
- The continuous growth of recent mobile and portable devices and applications has caused a tremendous thrust for low power circuit design. Static random access memory (SRAM) is a highly used circuit in modern processors and occupies a considerable
DE0_Nano_User_Manual_v1.5
- The DE0-Nano board introduces a compact-sized FPGA development platform suited for to a wide range of portable design projects, such as robots and mobile projects.
nano-logic
- 本手册适用于使用NANO-LOGIC CPLD 系列开发板的用户。 一款较高端FPGA 开发板既可以做项目开发也可以配上一个“通用的基础设备接口 板”作为新人培训入门使用 本产品的推出旨在于方便用户扩展基础设备和初学者学习使用。在FPGA 产品的设计 中，在初期调试时为了方便调试和显示程序工作状态，经常会用到大量的调试接口，比 如灯、按键、液晶显示等设备；这些设备既浪费有限的FPGA 资源又浪费宝贵的板卡体 积。本开发板提供了通常用户调试程序所需要的基础输入输出和上位机通
DE0_NANO_ADC
- Altera DE0-Nano 开发平台ADC模数转换应用官方DEMO。-Altera DE0-Nano development platform ADC analog-to-digital conversion applications official the DEMO.
DE0_NANO_GSensor
- Altera DE0-Nano 开发平台Gsensor传感器应用官方Demo。-Altera DE0-Nano the development platform Gsensor sensor applications Official Demo.
DE0_Nano_SOPC_DEMO
- Altera DE0-Nano 开发平台SOPC可编程片上系统实现官方Demo。-Altera DE0-Nano development platform the SOPC programmable on-chip system Official Demo.
DE0_NANO_default
- Altera DE0-Nano 开发平台点亮LED基本应用官方Demo。-Altera DE0-Nano development platform lit LED applications Official Demo.
myfirst_niosii
- Altera DE0-Nano 开发平台NiosII软核处理器RSIC。-Altera DE0-Nano development platform NiosII the soft core processor RSIC.
plj
- 时钟分频器原理与实现，计数跳变的频率和加减模式可实时变化，通过Nano实验板上的LCD显示器显示。计数频率、加减选择和初始化操作通过板上的拨动开关和Reset按钮实现。-Principle and Implementation clock divider, counting and addition and subtraction frequency hopping mode changes in real time, through the LCD display panel show Nan
DSCH2
- VLSI compiler or nano chip designer.
vga
- VGA project for DE0-nano
user_first_fpga_20170620
- 程序可实验开发板上LED循环点亮，且可通过按键控制流动速度，用到了PLL IP 和 计数器模块。(Program with LED flashing circuit uses PLL IP and counter. And extinction rate is controled by key.)
my_first_fpga
- DE0 NANO光盘附带的官方demo。使用者的第一个demo。(Official demo attached to DE0 NANO. The first demo of the user.)
Next186_SoC_DE0Nano_Quartus17.0_23Oct2017
- Next186 x86 for DE0-nano