搜索资源列表
flash_controller
- Altera下的FPGA运行Nios处理器的flash控制器-Altera
NIOS_JTAG_UART
- FPGA开发板上的JTAG——UART完成的工程设计，包括CPU内核设计合软件设计-FPGA development board JTAG- UART completed the engineering design, including the CPU core design combined software design
SOPC_NIOS_TEST
- ALTER+NIOS II+SOPC_Builder+NIOS II IDE例程（VHDL）-ALTER+ NIOS II+ SOPC_Builder+ NIOS II IDE routines (VHDL)
FD_sd_card_V1.0
- 本人上网下载下来并调试过的，完全实现NIOS 下对SD卡读写及包括FAT16文件系统的实现，使用的是QT8.1，FPGA里实现，里面有详细接线图，是完整的一个工程，在EP2C20Q240C8里调试成功-I downloaded off the Internet and debug off, and the full realization of NIOS under the SD card reader and includes FAT16 file system implementation,
hello_world_small
- 采用altera mac核加88e111物理层芯片的千兆网方案，该文件是配置mac层和物理层的nios文件，基于hello world small工程。-88e111 by altera mac core and Gigabit Ethernet physical layer chip of the program, the file is configured mac layer and physical layer nios file, based on hello world small
NI
- NI-共同提高基于多核的软硬件平台的互用性-NI-based multi-core hardware and software together to improve the interoperability platform
FPGA-SPI-Slave
- SPI通信基于NI FPGA，利用FPGA硬件对SPI通信进行解析。-SPI communication based on NI FPGA。Build the communication between PC and SPI device
NI-Tutorial-3536
- info about daq first steps
frac_divider_verilog
- This code has written in verilog and it can divide two fraction numbers in fixed point standard .In this code ni shows the number of bits of inputs and no shows the number of bits of output and if we want more precision we can change this parameters
clock_dis
- 电子时钟 电子时钟 数码管显示 电子时钟 -clock display zhen ni ma ma fan，zi jie ni mei
100KE-NI
- 基于fpga的计时模块设计，较简单是基础设计主要功能是计数。-Fpga-based timing module design is relatively simple, the main function of the basic design is to count.
t
- 用于NI单片机电流电压采样以及显示，其中含有部分程控电流与程控电压，可用于并联限流限压电路。(It is used for sampling and displaying the current and voltage of NI single-chip microcomputer. It contains part of program-controlled current and program-controlled voltage and can be used for parallel