搜索资源列表
actel-fpga-double-port-ram
- 基于Actel FPGA的双端口RAM设计--周立功单片机-Actel FPGA-based dual-port RAM design- ZLG MCU
256.16-RAM
- VHDL语言编写,实现256×16RAM块功能,稍加修改即可改变RAM块的容量-VHDL language, achieving 256 ×16RAM block .A little change can change the capacity of the block RAM
FPGA-RAM-Verilog
- 用Verilog语言编写的FPGA,对波形数据用RAM存储-Using Verilog language FPGA, using the waveform data stored in RAM
RAM
- 双口RAM与PXI总线接口设计,包括接口控制。-Dual-port RAM with PXI bus interface design, including interface control.
RAM
- 用VerilogHDL写的ram程序,对初学者会有帮助。-Writing the ram with VerilogHDL procedures will be helpful for beginners.
ram
- RAM存储器的源程序,可以试一试,看看好不好用-OH
ram
- a 16 by 4 ram is used for many applications as a basic component such as fifo and stack etc
ram
- 一些设用vhdl设计ram的资料,请下载看看吧-Vhdl design with a number of ram-based information, please download to see it
ram
- 基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
ram
- ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
RAM
- 这是个双端口双端口ram的定义,当然读者在此基础上还可以扩充-This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded
RAM
- 用VHDL编写一个字长16位,容量128B的RAM控制实现程序,并进行设计综合和功能模拟 。含源程序,及实验要求。适合初学者学习使用。-VHDL prepared with a 16-bit word length, 128B of the RAM capacity to achieve process control and design of analog integrated and functional. Containing source code, and experimental
ram
- 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware descr iption language to achieve a RAM memory.
RAM
- Ram with 8 bits implemented in vhdl verilog code
RAM
- 单端口RAM,自己写的单端口RAM,同步写入同步读出,包括TESTBENCH和测试模拟文件-RAM
ram-rom-VerilogHDL
- 利用Verilog编写的各种RAM ROM的代码以及他们的测试模块-Prepared using a variety of RAM ROM Verilog code and their test module
ram
- verilog 编写的ram代码,开发环境为quartus-ram write verilog code development environment for quartus
ram
- 用verilog实现32字节8位RAM(触发器和M4K),用LPM实现RAM-32-byte by 8-bit verilog RAM (triggers and M4K), achieved by LPM RAM
RAM
- VHDL 语言的RAM定制 VHDL 语言的RAM定制-VHDL language, VHDL language, custom RAM RAM RAM custom custom VHDL language
Complete-RAM
- ram 64KB designed by haneesh in verilog
