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VSR4_3
- 甚短距离互联（Veryshort reach VSR）协议编成实现-very short distance from the Internet (Veryshort reach VSR) composition to achieve agreement
02_SynthesizableMATLAB
- Lab 2 – Synthesizable MATLAB This lab exercise will explore the effects that different MATLAB coding styles have on hardware. The lab has two parts, each of which begins with a short introduction. This lab exercise is based on the simple MATLAB FIR
mutl16 实现16位移位乘法和除法
- 实现16位移位，可以实现乘法和除法。满足设计要求，实现代码简短，用verilog完成方便，容易操作。-Achieve 16-bit shift, multiplication and division can be achieved. Meet the design requirements to achieve a short code, complete with verilog convenient, easy to operate.
eda.rar
- 使用VHDL语言编程，烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟,The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock
small_fifo
- 同步fifo设计，仿真已通过，用Verilog编写，代码短小，易懂-Synchronous fifo design, simulation has been adopted, written with Verilog, code short and easy to understand
src
- 鼠标的verilog驱动，代码很短上电初始化后即可使用-Verilog mouse driver, code to initialize a very short period after the power to use
UART
- UART是一种广泛应用于短距离、低速、低成本通信的串行传输接口.由于常用UART芯片比较复杂且移植性差,提出一种采用可编程器件FPGA实现UART的方法, 实现了对UART的模块化设计.首先简要介绍UART的基本特点,然后依据其系统组成设计顶层模块,再采用有限状态机设计接收器模块和发送器模块,所有功能的实现全部采用VHDL进行描述,并用Modelsim软件对所有模块仿真实现.最后将UART的核心功能集成到FPGA上,使整体设计紧凑,小巧,实现的UART功能稳定、可靠. -UART is a wi
The_Ten_Commandments_of_Excellent_Design_VHDL_Exa
- This short paper will give you some VHDL code examples that will help you design synchronous circuits that work first time.The philosophy behind Ten-Commandment code is that synthesizers are not to be trusted too much. Most of the code you will see i
NIOSIIstepbystep
- 分步介绍了NIOS II的基本步骤，相信你可以在很短的时间内上手的-Step-by-step NIOS II introduces the basic steps, I believe you can in a very short time-to-use
200998301FSK
- 基于FPGA的利用FSK调制方式的无线传输系统中的短信息发送传输接收，对无线传输的学习有很大帮助！-FPGA-based FSK modulation used for wireless transmission system to send the short message transmission to receive, for wireless transmission of great help to learn!
51
- 可以在短时间内对你熟悉51的结构，起很大的指导作用，可以综合通过的。-In a short time you are familiar with the structure of 51, played a great guide can be integrated to pass.
liangzu
- 一小段梁祝音乐播放范例的文件，希望对学习verilog的初学者有所帮助。-Butterfly short sample music files, want to learn verilog beginner help.
music
- 是完成一小段音乐程序的开发，然后再用扬声器进行试听。下面主要介绍一下完成本实验的几个主要部分的工作原理。-Is the completion of the development of a short musical program, and then re-use loudspeakers to Lyrics. Following the completion of this experiment focuses on what part of several major works.
VAD_algorithm_and_FPGA_design
- 论文，关于VAD检测与FPGA如何实现的，基于短时能量-based on short energy ,VAD detected algorithm and FPGA design
Image
- it is a short program for reading the data of 128*64 lcd to find a fire point
pll
- DPLL由 鉴相器、 模K加减计数器、脉冲加减电路、同步建立侦察电路、模N分频器构成. 整个系统的中心频率(即signal_in和signal_out的码速率的2倍)为clk/8/N. 模K加减计数器的K值决定DPLL的精度和同步建立时间,K越大,则同步建立时间长,同步精度高.反之则短,低. -DPLL by the phase detector, K addition and subtraction counter mode, pulse subtraction circuit, sy
RS-5-3-CODE
- RS(5,3）编码器原程序 程序已经调试过 且比较简短-RS(5,3） coder ,this code is very short
fallthrough_small_fifo_v2
- 同步fifo设计，仿真已通过，用Verilog编写，代码短小-Synchronous fifo design, simulation has been adopted, written with Verilog, code short
fadder32
- 短代码实现32位全加器，带经Quartus II9.1编程测试全部文件-Short code to achieve 32-bit full adder, with programming tested by the Quartus II9.1 all documents
led
- 此书是针对于初学者而写的一本教程,里面对 LED 的各方 面进行了详细的介绍,,让初学者能够在很短的时候了解 LED 相关各种参数指标，LED 驱动，LED 应用的注意事 项等等，此书已经帮助了很多初学者和销售员，对初学者 和销售员来说,是一本入门极好的秘籍。 -This book is written for beginners but a tutorial, which the various aspects of the LED described in detail, s