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SimpleRAMModel
- 一个SIMPLE RAM ACCESS的VHDL很经典的例子，我老师的作品。-a SIMPLE RAM ACCESS VHDL classic example of my teacher's work.
74138_0
- 这是老师给的3—8译码器的源程序，自己刚才调试过了，真的成功了，哈哈……，有需要就看看吧-This the teacher for the 3-8 decoder source, have their own testing before, and really successful, ha ha ... there is a need to watch it!
4_10_vhdl
- 这是老师给但计数器程序，经过自己刚才调试过了，真的成功了，哈哈……，有需要就看看吧-This the teacher but to counter procedures, testing himself just over a really successful, ha ha ... there is a need to watch it!
8051ip
- fpga 51核，这个是我老师写的，现在就是输入输出io是分别定义的，希望能给大家提供一点帮助！-fpga 51 nuclear, this is written by my teacher, this is the input and output, respectively, the definition of io is the hope that we can provide a little help!
03_strcture_3
- VHDL的结构2，也是和前面传的那个来源于一个老师，可以说是老师的心得哦-VHDL structure of 2, and in front of Chuan is also derived from a teacher that can be said to be the teacher s experience oh
data_system_design_based_on_FPGA
- 用FPGA設計数字系统，2007年上海FPGA研修班王巍老师讲义-Digital System Design using FPGA, FPGA Shanghai in 2007 Wang Wei, a teacher seminar handouts
vhdl00023kejian
- VHDL课件 张建老师的精彩课件讲述了，中国著名的嵌入式开发人 -VHDL courseware courseware wonderful teacher Zhang Jian told China s well-known embedded development people
VHDL
- 我们老师给我们的介绍VHDL的课件，PDF格式，很不错，大家可以-Our teacher gave us an introduction VHDL courseware, PDF format, very good, we will look at
txt
- 老师上课的讲的程序 拿出来分享一下 关于电路VHDL语言的-Speaking teacher in the class to share out the procedure on the circuit VHDL language
fileread
- file_read vhdl code provide by my teacher for reading file into FSM-file_read vhdl code
digitalsystemdesign
- 非常经典的FPGA设计PPT，北航夏宇闻老师讲义-FPGA designs are very classic PPT, Beihang XIA Yu-Wen teacher handouts
FPGAebook
- FPGA入门级的教程，夏老师的，讲解比较清楚，-FPGA entry-level tutorials, summer teacher to explain more clearly, He He
paomadenghe60jinzhi
- 一个用VHDL编写的跑马灯程序和60进制计数器的程序，一个是自己设计的一个是老师要求，都在实验箱上验证成功，希望对大家有所帮助。-Marquee with a program written in VHDL, and 60 binary counter program, one designed by one teacher asked, are in the experimental boxes proved to be successful, want to help everyone.
2example
- 夏宇闻老师的verilog数字系统设计教程书上的所有例题的源程序-XIA Yu-Wen teacher' s verilog digital system design tutorial books, all the Example of the source code
16example
- 夏宇闻老师的verilog数字系统设计教程书上的所有例题的源程序16章-XIA Yu-Wen teacher' s verilog digital system design tutorial books, all of the source code Example Chapter 16
18example
- 夏宇闻老师的verilog数字系统设计教程书上的所有例题的源程序18章-XIA Yu-Wen teacher' s verilog digital system design tutorial books, all of the source code Example Chapter 18
pinlvji
- 测频控制信号发生器设计，防止可能产生的毛刺。这是老师给的实验程序，共享一下！-Design of frequency control signal generator, to prevent possible glitches. This is the teacher to the experimental procedures, share what!
jipinqicepinzhou
- 计频器有两种测量方法，即测频和测周，我们提出选用测频的方法，但是有时老师也会让我们编写可以选用测频、测周并且两者可以自动选择的程序，本程序即可达到这个要求。-Frequency meter, there are two measuring methods, that is, the frequency measurement and test week, we put forward to use frequency measure, but sometimes the teacher will
hspice1
- 电路设计和仿真工具hspice的重要使用文档。无师自通-Circuit design and simulation tools hspice important use of documents. Without a teacher
hspice2
- 电路设计和仿真工具hspice的重要使用文档。无师自通-Circuit design and simulation tools hspice important use of documents. Without a teacher