基于FPGA的摄像头读入，用到nios软核-verilog HDL

Least-squares algorithm to fit a three-dimensional plane, Implemented with SDRAM run nios, while saving camera data SRAM, Very convenient to use.

Implemented with SDRAM run nios, while saving camera data SRAM, Is a good learning materials to learn PCA feature extraction, Phased array antenna pattern (Chebyshev weights).