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procedures89C51.rar
- 该电路由AT89C51单片机,CD4511*3为BCD-七段锁存/译码/驱动器,LED共阴数码管,磁敏霍尔元件组成。 ,The circuit from the AT89C51 single-chip, CD4511* 3 for the BCD-Seven-Segment Latch/Decoder/Driver, LED digital tube were negative, magnetic components敏霍尔.
74HC573
- 本程序是通过74HC573锁存器控制八个数码管,给大家参考。-The program is controlled through the 74HC573 latch 8 digital tube, for your reference.
shuzishizhong125
- 数字钟的设计【数字电子技术课程设计】 数字钟实际上是一个对标准频率-The figure vies for the answering device by the subject circuit and expands the circuit to make up . Have priority in code circuit , latch , decipher circuit and export the input signal of the entrant team on the dis
Latch
- can make a latch counter by 8051
8051and1601LCD
- 运用51单片控制锁存器译码器等,完成一个简单的计算器系统-Control the use of 51 single latch decoder and so on, to complete a simple calculator system
li
- 动态显示的特点是将所有位数码管的段选线并联在一起,由位选线控制是哪一位数码管有效。这样一来,就没有必要每一位数码管配一个锁存器,从而大大地简化了硬件电路。选亮数码管采用动态扫描显示。所谓动态扫描显示即轮流向各位数码管送出字形码和相应的位选,利用发光管的余辉和人眼视觉暂留作用,使人的感觉好像各位数码管同时都在显示。动态显示的亮度比静态显示要差一些,所以在选择限流电阻时应略小于静态显示电路中的。-Dynamic display characteristics of all digital tube
program
- 1、 编程完成显示程序,要求在实验箱BANK2部分数码管上显示“1234”,请认真阅读电路,计算出段码锁存器和位选锁存器的地址,显示程序仍然按照“送段码、送位选、延时、消隐”的十字方针进行控制,只是控制的方法不同了,此时锁存器的LE端口由地址总线控制。 2、 根据实验箱BANK2部分电路,完成由8255的I/O扩展操作,在8255A的PA口上接有8个发光二极管,在其上完成一流水灯程序。 3、 根据实验箱BANK2部分电路,完成由8255的I/O扩展操作,将8255A PB口上外接的拨码开
74hc595
- 74HC595驱动程序 5个74HC595一起,CLK和DATA脚分别连起来,LATCH脚独立控制 -74HC595 driver 5 74HC595 together, CLK and DATA feet respectively link the, LATCH foot independent control
control
- 频率计的设计中一个模块,即测频控制器,上升沿的时候锁存,下降沿的时候重置-Frequency of the design of a module that measured frequency controller, the rising edge of latch, when the falling edge of the reset
Based-on-single-chip-computer
- 利用单片机和串行移位输入、八位并行带锁存输出芯片的基本功能设计出驱动LED组成大屏幕显示屏,实现对需要参数的显示-Microcontroller and serial shift input and eight parallel with the basic functions of the latch output chip designed to drive LED composed of large-screen display, the display parameters need
LED
- 数据的锁存和LED数码管显示接口实验 1.了解及掌握数据的锁存和六位7段LED数码管动态扫描显示接口的硬件和软件的设计方法; 2、设计显示六位静止不动字符的程序。 -Data latch and LED digital display interface experiment 1. Understand and master data latch and six seven segment LED display interface dynamic scanning hardware a
51
- 基于51单片机的30秒倒计时源程序,八路抢答锁存功能-Based on 51 single-chip 30-second countdown to the source, eight-way Responder latch function
ad-zhuanhuan
- 本实验采用 ADC0809 做 A/D 转换实验。ADC0809 是一种8路模拟输入、8位数字输出的逐次逼近法A/D器件,转换时间约100us,转换精度为±1/512,适用于多路数据采集系统。ADC0809片内有三态输出的数据锁存器,故可以与8088微机总线直接接口。-In this study do ADC0809 A/D conversion experiments. ADC0809 is an 8-channel analog inputs, 8 digital outputs succ
D_latch
- 硬件描述语言写的D锁存器源代码,适合于EDA技术与应用开发-Hardware descr iption language to write D latch source code, suitable for EDA technology and application development
8、交通灯
- //---定义IO口---// #define GPIO_DIG P0 //显示段码端口,74HC573锁存器; #define GPIO_PALCE P1 //数码管片选端口,74HC138译码器; #define GPIO_TRAFFIC P2 //交通灯端口; sbit RED10=P2^0; //上人行道红灯; sbit GREEN10=P2^1; //上人行道绿灯; sbit RED11=P2^2; //上机动车红灯; sbit YE
Verilog源代码
- 多种基本功能的Verilog代码实现,包括多路选择器,二进制到BCD码转换,二进制到格雷码转换,7段译码器,8位数据锁存器,移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit dat
