FPGA用于实现crc16编码的verlog源程序，用到的请下载。-FPGA is used to achieve the the crc16 the encoding of verlog source code used to download.

通过Verlog编程，实现一个同步二十四进制计数器，要求有1个异步清零端、1个时钟脉冲输入 -By Verlog programming, to achieve a synchronous binary counter twenty-four, requires an asynchronous clear terminal, a clock pulse input