Active控件Card调用和自制.rar

设计实现4bit FIFO, 数据深度为8， 产生满， 空状态标志-The diagram of FIFO is shown in figure 1. The FIFO consists of two component: FIFO control logic and RAM. The control logic generates the address (ADD) and write enable (WE) to the RAM so that the fi

DC-Dc converter, Active power filter

proteus单片机仿真-有源蜂铃器 #include<reg51.h> sbit Buzzer P0^0 void main(void) { int i,n n 60 while(1) { Buzzer 1 for(i 1 i<n i++) Buzzer 0 for(i 1 i<n i++) } }-Proteus single-chip microcomputer simu