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  1. DSP

    2下载:
  2. 。本文针对三电平高压变频器控制要 求的特点,设计了基于DSP 和FPGA 的控制电路。利用DSP 进行高速浮点计算,满足实时控制的要求;FPGA 并行执行 程序,实现了多路触发信号的同时控制,而且由于采用了硬 件电路完成计算,提高了控制系统的可靠性-. In this paper, three-level voltage inverter control requirements of the features, design and FPGA-based DSP control
  3. 所属分类:Development Research

    • 发布日期:2015-06-17
    • 文件大小:321018
    • 提供者:scnu
  1. ADSP-21262

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  2. High performance 32-bit/40-bit floating-point processor Code compatibility—at assembly level, uses the same instruction set as other SHARC DSPs Single-instruction multiple-data (SIMD) computational architecture— two 32-bit IEEE floating-point
  3. 所属分类:Development Research

    • 发布日期:2017-03-29
    • 文件大小:507942
    • 提供者:ak
  1. Chong_Rapid-Floating-Point-Unit-Generation-with-B

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  2. The creation of a custom FPU requires the selection of a subset of the full floating-point instruction set and the implementation of this subset in hardware, such that the runtime of the application is minimized. To minimize area, it is desir
  3. 所属分类:Development Research

    • 发布日期:2017-03-23
    • 文件大小:426676
    • 提供者:Liang
  1. Chong_Automatic-Floatingpoint-Unit-Generation_DAT

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  2. This paper describes the creation of custom floating point units (FPUs) for Application Specific Instruction Set Processors (ASIPs).
  3. 所属分类:Development Research

    • 发布日期:2017-04-06
    • 文件大小:225862
    • 提供者:Liang
  1. today_blog

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  2. Algorithm development starts in MATLAB, Lab-view, C and JAVA which uses complex floating point arithmetic. These algorithms get transfer to hardware implementation team. Then the hardware design teams implement this abstract algorithm on the speci
  3. 所属分类:Development Research

    • 发布日期:2017-04-25
    • 文件大小:106849
    • 提供者:Virender
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